PyFPGA / pyfpga
A Python package to use FPGA development tools programmatically.
☆96Updated last month
Alternatives and similar repositories for pyfpga:
Users that are interested in pyfpga are comparing it to the libraries listed below
- Temporary repo to gather information about the Kria KV260 board☆60Updated 3 years ago
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆134Updated last year
- Python script to transform a VCD file to wavedrom format☆75Updated 2 years ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆138Updated 7 months ago
- Extensible FPGA control platform☆55Updated last year
- Python Verilog value change dump (VCD) parser library + the nifty vcdcat VCD command line pretty printer.☆57Updated 2 months ago
- Framework Open EDA Gui☆63Updated last month
- Fabric generator and CAD tools☆155Updated this week
- Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.☆149Updated 2 years ago
- Vitis Model Composer Examples and Tutorials☆80Updated this week
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆51Updated 2 years ago
- Tutorial of a HW design of MicroBlaze using DDR3 RAM on Arty A7 board; DDR3 RAM speed test application☆38Updated 7 months ago
- Verilog digital signal processing components☆120Updated 2 years ago
- Open-Source HLS Examples for Microchip FPGAs☆40Updated last month
- Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.☆52Updated this week
- Control and status register code generator toolchain☆112Updated 3 weeks ago
- A huge collection of VHDL/Verilog open-source IP cores scraped from the web☆62Updated 9 years ago
- BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/☆81Updated 2 weeks ago
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆61Updated 3 weeks ago
- A collection of reusable, high-quality, peer-reviewed VHDL building blocks.☆131Updated this week
- FuseSoC standard core library☆124Updated 3 weeks ago
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆63Updated last week
- Verilog UART☆133Updated 11 years ago
- Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )☆53Updated 2 months ago
- PYNQ Composabe Overlays☆69Updated 7 months ago
- ☆107Updated last month
- ☆44Updated last year
- FPGA and Digital ASIC Build System☆71Updated this week
- A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools☆40Updated 6 years ago
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆56Updated 2 months ago