Alternatives and similar repositories for rtl-debugger

Users that are interested in rtl-debugger are comparing it to the libraries listed below

• GuzTech / misato
  RISC-V Processor written in Amaranth HDL
  ☆39Updated 3 years ago
• amaranth-lang / amaranth-stdio
  Industry standard I/O for Amaranth HDL
  ☆29Updated 11 months ago
• amaranth-lang / amaranth-soc
  System on Chip toolkit for Amaranth HDL
  ☆92Updated 11 months ago
• YosysHQ / prjpeppercorn
  Project Peppercorn - GateMate FPGA Bitstream Documentation
  ☆26Updated last week
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆96Updated last year
• prjunnamed / prjcombine
  An FPGA reverse engineering and documentation project
  ☆58Updated 2 weeks ago
• cr1901 / sentinel
  Another size-optimized RISC-V CPU for your consideration.
  ☆58Updated 2 weeks ago
• apertus-open-source-cinema / naps
  An experiment for building gateware for the axiom micro / beta using amaranth-hdl
  ☆45Updated 4 months ago
• efabless / clear
  ☆70Updated last year
• emard / ulx3s-misc
  Miscellaneous ULX3S examples (advanced)
  ☆79Updated 3 months ago
• daveshah1 / prjtrellis-dvi
  DVI video out example for prjtrellis
  ☆16Updated 6 years ago
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆113Updated 4 years ago
• colognechip / gatemate_ila
  The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …
  ☆54Updated last week
• prjunnamed / prjunnamed
  End-to-end synthesis and P&R toolchain
  ☆89Updated 2 weeks ago
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated 5 months ago
• Wren6991 / Hazard2
  Smol 2-stage RISC-V processor in nMigen
  ☆26Updated 4 years ago
• ECP5-PCIe / ECP5-PCIe
  Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
  ☆100Updated 2 years ago
• Ravenslofty / blog
  The Critical Path - a rambly FPGA blog
  ☆49Updated 5 years ago
• wyvernSemi / usbModel
  USB virtual model in C++ for Verilog
  ☆31Updated 11 months ago
• lethalbit / kicad-pdk-libs
  KiCad symbol library for sky130 and gf180mcu PDKs
  ☆32Updated last year
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆31Updated 3 years ago
• kbeckmann / pergola_projects
  My pergola FPGA projects
  ☆30Updated 4 years ago
• OLIMEX / GateMateA1-EVB
  Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040
  ☆32Updated 9 months ago
• RobertBaruch / amaranth-tutorial
  ☆43Updated 2 years ago
• ydnatag / nmigen-cocotb
  cocotb extension for nMigen
  ☆17Updated 3 years ago
• mattvenn / magic-inverter
  an inverter drawn in magic with makefile to simulate
  ☆26Updated 3 years ago
• tomverbeure / cxxrtl_eval
  Experiments with Yosys cxxrtl backend
  ☆50Updated 8 months ago
• whitequark / Yumewatari
  妖刀夢渡
  ☆60Updated 6 years ago
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆39Updated last year
• bieganski / mtkcpu
  RISC-V CPU implementation in Amaranth HDL (aka nMigen)
  ☆32Updated last year