Alternatives and similar repositories for Iron

Users that are interested in Iron are comparing it to the libraries listed below

• gatecat / hrt
  Hot Reconfiguration Technology demo
  ☆40Updated 2 years ago
• cr1901 / sentinel
  Another size-optimized RISC-V CPU for your consideration.
  ☆58Updated last week
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated 2 months ago
• prjunnamed / prjcombine
  An FPGA reverse engineering and documentation project
  ☆48Updated 3 weeks ago
• tomverbeure / cxxrtl_eval
  Experiments with Yosys cxxrtl backend
  ☆49Updated 5 months ago
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆71Updated this week
• darklife / udarkrisc
  u[Dark]RISC -- "micro-darkrisc" -- an early 16-bit micro-RISC processor defined before DarkRISCV
  ☆15Updated last year
• suarezvictor / litex_imgui_usb_demo
  Soft USB for LiteX
  ☆50Updated 2 years ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆45Updated 4 months ago
• kuznia-rdzeni / coreblocks
  RISC-V out-of-order core for education and research purposes
  ☆59Updated last week
• j-core / jcore-cpu
  J-Core J2/J32 5 stage pipeline CPU core
  ☆53Updated 4 years ago
• grayresearch / s3ga
  S3GA: a simple scalable serial FPGA
  ☆10Updated 2 years ago
• machdyne / kakao
  Kakao Linux
  ☆36Updated last month
• swetland / os-workshop
  Some materials and sample source for RV32 OS projects.
  ☆22Updated 3 years ago
• jevinskie / riscv-smol-linux-kernel
  Patched sources/configs for RISC-V Linux with musl-based toolchain targeting 8 MB RAM
  ☆24Updated 2 years ago
• olofk / qerv
  ☆17Updated 2 months ago
• amaranth-lang / amaranth-soc
  System on Chip toolkit for Amaranth HDL
  ☆92Updated 9 months ago
• JulianKemmerer / PipelineC-Graphics
  Graphics demos
  ☆110Updated last year
• Wren6991 / Hazard2
  Smol 2-stage RISC-V processor in nMigen
  ☆26Updated 4 years ago
• RobertBaruch / n6800
  A 6800 CPU written in nMigen
  ☆49Updated 4 years ago
• amaranth-lang / amaranth-stdio
  Industry standard I/O for Amaranth HDL
  ☆28Updated 9 months ago
• bieganski / mtkcpu
  RISC-V CPU implementation in Amaranth HDL (aka nMigen)
  ☆29Updated 10 months ago
• Mr-Bossman / KISC-V
  KISCV, a KISS principle riscv32i CPU
  ☆22Updated 6 months ago
• BrunoLevy / TordBoyau
  A pipelined RISC-V processor
  ☆57Updated last year
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆113Updated 3 years ago
• YoWASP / vscode
  YoWASP toolchain for Visual Studio Code
  ☆20Updated last week
• regymm / pcie_7x
  PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers
  ☆45Updated 2 months ago
• fallen / SucreLA
  Open source Logic Analyzer based on LiteX SoC
  ☆26Updated 3 months ago
• mattvenn / vga_clock_pcb
  Open source hardware down to the chip level!
  ☆30Updated 3 years ago
• trabucayre / quickfeather-notes
  Notes, scripts and apps to quickfeather board
  ☆10Updated 3 years ago