prjunnamed / prjcombineLinks
An FPGA reverse engineering and documentation project
☆61Updated last week
Alternatives and similar repositories for prjcombine
Users that are interested in prjcombine are comparing it to the libraries listed below
Sorting:
- End-to-end synthesis and P&R toolchain☆92Updated last week
- Another size-optimized RISC-V CPU for your consideration.☆58Updated last week
- Experiments with Yosys cxxrtl backend☆50Updated 10 months ago
- System on Chip toolkit for Amaranth HDL☆97Updated last year
- Exploring gate level simulation☆58Updated 7 months ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆102Updated 2 years ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Updated last year
- The open-source Zynq 7000 BSP generator for openXC7☆48Updated 10 months ago
- Industry standard I/O for Amaranth HDL☆30Updated last year
- PicoRV☆43Updated 5 years ago
- 妖刀夢渡☆63Updated 6 years ago
- Hot Reconfiguration Technology demo☆41Updated 3 years ago
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆31Updated 4 years ago
- A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.☆19Updated 3 years ago
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆30Updated this week
- RISC-V Processor written in Amaranth HDL☆39Updated 3 years ago
- RFCs for changes to the Amaranth language and standard components☆18Updated last week
- User-friendly explanation of Yosys options☆113Updated 4 years ago
- ☆16Updated last year
- PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers☆64Updated 7 months ago
- The Critical Path - a rambly FPGA blog☆50Updated 5 years ago
- Iron: selectively turn RISC-V binaries into hardware☆23Updated 2 years ago
- RISC-V out-of-order core for education and research purposes☆81Updated this week
- Playground for experimenting with and sharing short Amaranth programs on the web☆20Updated last month
- Board definitions for Amaranth HDL☆121Updated 3 months ago
- ☆22Updated 3 years ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆45Updated 6 months ago
- Unofficial Yosys WebAssembly packages☆74Updated this week
- KiCad symbol library for sky130 and gf180mcu PDKs☆32Updated last year
- This repository contains iCEBreaker examples for Amaranth HDL.☆39Updated 2 years ago