[MIGRATED to https://codeberg.org/prjunnamed/prjcombine/] An FPGA reverse engineering and documentation project
☆65Mar 12, 2026Updated 4 months ago
Alternatives and similar repositories for prjcombine
Users that are interested in prjcombine are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- [MIGRATED to https://codeberg.org/prjunnamed/prjunnamed] End-to-end synthesis and P&R toolchain☆95Mar 12, 2026Updated 4 months ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Dec 3, 2024Updated last year
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆103May 16, 2023Updated 3 years ago
- 妖刀夢渡☆64Apr 2, 2019Updated 7 years ago
- VHDL Code for infrastructural blocks (designed for FPGA)☆15Oct 26, 2022Updated 3 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- photonSDI - an open source SDI core☆11May 26, 2021Updated 5 years ago
- nMigen examples for the ULX3S board☆12May 5, 2022Updated 4 years ago
- Demonstration of the YoWASP toolchain being used with Visual Studio Code to program a Radiona ULX3S board☆11Jan 1, 2024Updated 2 years ago
- LiteX LUNA USB stack integration☆14Jun 12, 2022Updated 4 years ago
- Documenting Lattice's 28nm FPGA parts☆153Updated this week
- AXI support for Migen/MiSoC☆28Jun 5, 2025Updated last year
- Documenting the Anlogic FPGA bit-stream format.☆90Dec 25, 2022Updated 3 years ago
- Set up your GitHub Actions workflow with a OSS CAD Suite☆16Mar 19, 2026Updated 4 months ago
- gateware for the main fpga, including a hispi decoder and image processing☆13Sep 27, 2018Updated 7 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A configurable and approachable tool for FPGA debugging and rapid prototyping.☆150Mar 29, 2026Updated 3 months ago
- Low-area DVI experiment for iCE40 UP5k and HX1k FPGAs☆34Jul 15, 2021Updated 5 years ago
- Tool for updating the contents of BlockRAMs found in Xilinx 7 series bitstreams.☆19Feb 9, 2022Updated 4 years ago
- HiLoTOF -- Hardware-in-the-Loop Test framework for Open FPGAs☆13Feb 9, 2019Updated 7 years ago
- Cyclone V bitstream reverse-engineering project☆134Oct 19, 2023Updated 2 years ago
- QSPI flash multiplexer - connect a SPI NOR flash to either an embedded system or a programmer for remote firmware tests☆57Nov 22, 2020Updated 5 years ago
- A C64 SID Chip recreation in FPGA☆43Jun 14, 2022Updated 4 years ago
- SD device emulator from ProjectVault☆21Sep 24, 2019Updated 6 years ago
- SDI interface board for the apertus° AXIOM beta camera☆13Jan 19, 2019Updated 7 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆46May 25, 2025Updated last year
- Siglent SDS1x0xX-E FPGA bitstreams☆46Dec 24, 2024Updated last year
- This project contains Verilog designs and a PCB for the implementation of CSI-2 camera interface to HDMI bridge on a Gatemate FPGA from C…☆20Jul 28, 2025Updated 11 months ago
- System on Chip toolkit for Amaranth HDL☆101May 23, 2026Updated last month
- ☆14Aug 25, 2019Updated 6 years ago
- LunaPnR is a place and router for integrated circuits☆48Feb 11, 2026Updated 5 months ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Nov 27, 2018Updated 7 years ago
- Hardware Design/Visualization/Simulation/RTLGeneration Framework☆18Updated this week
- Documenting the Microchip (Atmel) ATF15xx CPLD fuse maps and programming algorithms☆59Jun 10, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆15Sep 13, 2024Updated last year
- Information on cores available on the Ulx3s ECP5 FPGA board☆14May 1, 2020Updated 6 years ago
- nMigen examples for the ULX3S board☆16Nov 30, 2020Updated 5 years ago
- SystemVerilog design elaborator into word-level netlist form☆240Updated this week
- ☆64Jul 21, 2020Updated 6 years ago
- Translation of Anlogic's FPGA datasheet, manual etc. to English.☆56Dec 29, 2018Updated 7 years ago
- PCIe analyzer experiments☆69May 21, 2020Updated 6 years ago