cr1901 / sentinelLinks
Another size-optimized RISC-V CPU for your consideration.
☆58Updated last week
Alternatives and similar repositories for sentinel
Users that are interested in sentinel are comparing it to the libraries listed below
Sorting:
- RISC-V Processor written in Amaranth HDL☆39Updated 3 years ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Updated last year
- Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker☆103Updated 2 years ago
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆35Updated last month
- User-friendly explanation of Yosys options☆113Updated 4 years ago
- RISC-V CPU implementation in Amaranth HDL (aka nMigen)☆33Updated last year
- Exploring gate level simulation☆59Updated 8 months ago
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆104Updated 4 months ago
- System on Chip toolkit for Amaranth HDL☆97Updated last year
- Programmer for the Lattice ECP5 series, making use of FTDI based adaptors☆91Updated last year
- Reusable Verilog 2005 components for FPGA designs☆49Updated 3 weeks ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆109Updated 3 weeks ago
- An FPGA reverse engineering and documentation project☆63Updated 2 weeks ago
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆31Updated last week
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆58Updated last month
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆36Updated 2 years ago
- Miscellaneous ULX3S examples (advanced)☆81Updated 6 months ago
- ☆47Updated 2 years ago
- PCIe Endpoint on Xilinx 7-Series FPGAs with the PCIE_2_1 hard block and GTP transceivers☆66Updated 8 months ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆45Updated 7 months ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆93Updated 7 years ago
- A Risc-V SoC for Tiny Tapeout☆43Updated last month
- ☆71Updated last year
- Low-cost ECP5 FPGA development board☆80Updated 5 years ago
- snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support☆29Updated last year
- Tiny tips for Colorlight i5 FPGA board☆62Updated 4 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆91Updated 6 months ago
- Nitro USB FPGA core☆86Updated last year
- Example Verilog code for Ulx3s☆41Updated 3 years ago
- Smol 2-stage RISC-V processor in nMigen☆26Updated 4 years ago