cr1901 / sentinelLinks
Another size-optimized RISC-V CPU for your consideration.
☆59Updated last week
Alternatives and similar repositories for sentinel
Users that are interested in sentinel are comparing it to the libraries listed below
Sorting:
- RISC-V Processor written in Amaranth HDL☆39Updated 4 years ago
- User-friendly explanation of Yosys options☆113Updated 4 years ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Updated last year
- snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support☆29Updated last year
- Exploring gate level simulation☆58Updated 9 months ago
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆107Updated 5 months ago
- Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker☆103Updated 2 years ago
- RISC-V CPU implementation in Amaranth HDL (aka nMigen)☆33Updated last year
- Programmer for the Lattice ECP5 series, making use of FTDI based adaptors☆91Updated last year
- System on Chip toolkit for Amaranth HDL☆100Updated 2 weeks ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆111Updated last week
- Full Speed USB DFU interface for FPGA and ASIC designs☆20Updated last year
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆36Updated 2 months ago
- An FPGA reverse engineering and documentation project☆65Updated this week
- Project Peppercorn - GateMate FPGA Bitstream Documentation☆32Updated last week
- Reusable Verilog 2005 components for FPGA designs☆49Updated last month
- Tiny tips for Colorlight i5 FPGA board☆65Updated 4 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆59Updated 2 months ago
- KiCad symbol library for sky130 and gf180mcu PDKs☆32Updated last year
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆36Updated 2 years ago
- ☆48Updated 2 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆92Updated 7 months ago
- Smol 2-stage RISC-V processor in nMigen☆26Updated 4 years ago
- Miscellaneous ULX3S examples (advanced)☆82Updated this week
- Board definitions for Amaranth HDL☆122Updated 5 months ago
- Industry standard I/O for Amaranth HDL☆31Updated 2 weeks ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆45Updated 8 months ago
- Basic Pong you can extend with rotary, sound, vga generator and autopilot☆11Updated 4 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆92Updated 7 years ago
- ☆72Updated last year