cjhonlyone / picorv32_XilinxLinks
A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
☆73Updated 4 years ago
Alternatives and similar repositories for picorv32_Xilinx
Users that are interested in picorv32_Xilinx are comparing it to the libraries listed below
Sorting:
- Cortex M0 based SoC☆74Updated 4 years ago
- SDRAM controller with AXI4 interface☆96Updated 6 years ago
- RTL Verilog library for various DSP modules☆90Updated 3 years ago
- FFT implement by verilog_测试验证已通过☆60Updated 9 years ago
- 视频旋转(2019FPGA大赛)☆36Updated 5 years ago
- AXI DMA 32 / 64 bits☆120Updated 11 years ago
- Interface Protocol in Verilog☆50Updated 6 years ago
- A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)☆123Updated 3 years ago
- ☆36Updated 10 years ago
- AHB3-Lite Interconnect☆92Updated last year
- PCIE 5.0 Graduation project (Verification Team)☆79Updated last year
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆65Updated 5 years ago
- AMBA bus generator including AXI, AHB, and APB☆106Updated 4 years ago
- An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器,可实现视频压缩。☆133Updated last year
- An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …☆138Updated 2 years ago
- AHB DMA 32 / 64 bits☆56Updated 11 years ago
- AXI总线连接器☆103Updated 5 years ago
- AXI Interface Nand Flash Controller (Sync mode)☆96Updated last year
- PulseRain Reindeer - RISCV RV32I[M] Soft CPU☆128Updated 6 years ago
- ☆68Updated 9 years ago
- Verilog implementation of fixed-point numbers, supports custom bit width, arithmetic, converting to float, with single cycle & pipeline v…☆206Updated 2 years ago
- upgrade to e203 (a risc-v core)☆44Updated 5 years ago
- Step by step tutorial for building CortexM0 SoC☆38Updated 3 years ago
- ☆78Updated 3 years ago
- UVM实战随书源码☆54Updated 6 years ago
- AXI4 and AXI4-Lite interface definitions☆94Updated 4 years ago
- DDR2 memory controller written in Verilog☆77Updated 13 years ago
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…☆109Updated 2 years ago
- Must-have verilog systemverilog modules☆37Updated 3 years ago
- A SATA host (HBA) core based on Xilinx FPGA with GTH to read/write hard disk. 一个基于Xilinx FPGA中的GTH的SATA host控制器,用来读写硬盘。☆116Updated 2 years ago