System on Chip with RISCV-32 / RISCV-64 / RISCV-128
☆22Oct 19, 2026Updated last week
Alternatives and similar repositories for SoC-RISCV
Users that are interested in SoC-RISCV are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Processing Unit with RISCV-32 / RISCV-64 / RISCV-128☆20Oct 19, 2026Updated last week
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆14Oct 19, 2026Updated last week
- System on Chip verified with UVM/OSVVM/FV☆37Oct 19, 2026Updated last week
- Direct Access Memory for MPSoC☆13Oct 19, 2026Updated last week
- Multi-Processor System on Chip verified with UVM/OSVVM/FV☆39Oct 19, 2026Updated last week
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Network on Chip for MPSoC☆30Oct 19, 2026Updated last week
- ☆12Feb 16, 2019Updated 7 years ago
- A systemverilog/UVM/Makefile testbench for Rocket RISC-V SoCs☆11Jun 19, 2020Updated 6 years ago
- Neural Turing Machine for a Multi-Processor System on Chip verified with UVM/OSVVM/FV☆12Oct 21, 2026Updated last week
- Hardware Description Language Translator☆17Oct 20, 2026Updated last week
- ☆16Jul 16, 2026Updated 3 months ago
- Hardware Description Language Translator☆19Oct 20, 2026Updated last week
- Advanced Verification Methodologies for RISC-V and related IP☆10Jan 16, 2023Updated 3 years ago
- UVM examples☆14May 1, 2015Updated 11 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- A configurable general purpose graphics processing unit for☆12May 18, 2019Updated 7 years ago
- An example Hardware Processing Engine☆12Feb 4, 2023Updated 3 years ago
- pulp_soc is the core building component of PULP based SoCs☆86Jul 17, 2026Updated 3 months ago
- 10-stage out-of-order RV64IMAFDC CPU☆11Updated this week
- Parallel Array of Simple Cores. Multicore processor.☆101May 16, 2019Updated 7 years ago
- [UNRELEASED] FP div/sqrt unit for transprecision☆28Jul 27, 2026Updated 3 months ago
- HF-RISC SoC☆39Mar 22, 2026Updated 7 months ago
- Theia: ray graphic processing unit☆22Jul 17, 2014Updated 12 years ago
- Is a collection of NULL Convention Logic (NCL) circuits and libraries written in Verilog to provide the experience of logically determine…☆16Jun 15, 2016Updated 10 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆25Feb 1, 2020Updated 6 years ago
- ☆24May 18, 2022Updated 4 years ago
- Advanced Debug Interface☆14Jan 23, 2025Updated last year
- ☆28Jun 21, 2024Updated 2 years ago
- For pre-silicon developers of RISC-V systems, riscv-vip is a SystemVerilog project that helps with pre-si verification and debug☆67Jan 13, 2021Updated 5 years ago
- Experiments with fixed function renderers and ChiselHDL☆61Updated this week
- Minimal microprocessor☆21Jul 1, 2017Updated 9 years ago
- Wake build descriptions of hardware generators☆12Dec 11, 2020Updated 5 years ago
- mirror of https://git.elphel.com/Elphel/eddr3☆42Oct 16, 2017Updated 9 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Designed a closed page policy memory controller following the timing specifications for DDR3 DRAM in system verilog. Was responsible for …☆11Mar 4, 2020Updated 6 years ago
- This project has files needed to design and characterise flipflop☆21Jun 3, 2019Updated 7 years ago
- This is the RTL implementation of Shenjing, a low power neuromorphic computing accelerator☆18Apr 12, 2020Updated 6 years ago
- Linux-capable superscalar out-of-order RISC core (with Cache& MMU) and SoC, having been verified on Xilinx Kintex-7 FPGA.☆56Aug 14, 2024Updated 2 years ago
- ELVE : ELVE Logic Visualization Engine☆11Jul 2, 2017Updated 9 years ago
- 标准视频时序生成器☆10Feb 9, 2020Updated 6 years ago
- 位宽和深度可定制的异步FIFO☆14May 29, 2024Updated 2 years ago