PacoReinaCampo / SoC-RISCVLinks
System on Chip with RISCV-32 / RISCV-64 / RISCV-128
☆22Updated 4 months ago
Alternatives and similar repositories for SoC-RISCV
Users that are interested in SoC-RISCV are comparing it to the libraries listed below
Sorting:
- A configurable general purpose graphics processing unit for☆11Updated 6 years ago
- Ethernet MAC 10/100 Mbps☆27Updated 3 years ago
- An Open Source Link Protocol and Controller☆26Updated 4 years ago
- Register-based and RAM-based FIFOs designed in Verilog/System Verilog.☆19Updated last year
- ASIC Design of the openSPARC Floating Point Unit☆14Updated 8 years ago
- Advanced Debug Interface☆15Updated 8 months ago
- ☆18Updated 5 years ago
- RISCV core RV32I/E.4 threads in a ring architecture☆32Updated 2 years ago
- LIS Network-on-Chip Implementation☆31Updated 9 years ago
- AXI4-Compatible Verilog Cores, along with some helper modules.☆16Updated 5 years ago
- DSP WishBone Compatible Cores☆14Updated 11 years ago
- A small 32-bit implementation of the RISC-V architecture☆32Updated 5 years ago
- SCARV: a side-channel hardened RISC-V platform☆27Updated 2 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆13Updated 4 months ago
- Theia: ray graphic processing unit☆20Updated 11 years ago
- Generic AXI master stub☆19Updated 11 years ago
- ☆13Updated 2 years ago
- mirror of https://git.elphel.com/Elphel/eddr3☆40Updated 7 years ago
- SPIR-V fragment shader GPU core based on RISC-V☆41Updated 4 years ago
- Network on Chip for MPSoC☆28Updated 4 months ago
- Common SystemVerilog package used by all RoaLogic IP with AMBA AHB3-Lite interfaces☆17Updated last year
- ☆19Updated last month
- Hamming ECC Encoder and Decoder to protect memories☆34Updated 8 months ago
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆30Updated 9 years ago
- Parallel Array of Simple Cores. Multicore processor.☆99Updated 6 years ago
- Multi-Processor System on Chip verified with UVM/OSVVM/FV☆34Updated 4 months ago
- RISC-V soft-core PEs for TaPaSCo☆22Updated last year
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆30Updated last year
- Processing Unit with RISCV-32 / RISCV-64 / RISCV-128☆20Updated 4 months ago
- Fork of OpenCores jpegencode with Cocotb testbench☆47Updated 10 years ago