PacoReinaCampo / SoC-RISCVLinks
System on Chip with RISCV-32 / RISCV-64 / RISCV-128
☆22Updated 2 weeks ago
Alternatives and similar repositories for SoC-RISCV
Users that are interested in SoC-RISCV are comparing it to the libraries listed below
Sorting:
- A configurable general purpose graphics processing unit for☆12Updated 6 years ago
- Advanced Debug Interface☆14Updated last year
- An Open Source Link Protocol and Controller☆28Updated 4 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆13Updated this week
- ASIC Design of the openSPARC Floating Point Unit☆15Updated 8 years ago
- RISCV core RV32I/E.4 threads in a ring architecture☆33Updated 2 years ago
- LIS Network-on-Chip Implementation☆34Updated 9 years ago
- Synchronous FIFOs designed in Verilog/System Verilog.☆25Updated last month
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆30Updated last year
- RISC-V soft-core PEs for TaPaSCo☆23Updated last week
- USB 2.0 FS Device controller IP core written in SystemVerilog☆39Updated 7 years ago
- Common SystemVerilog package used by all RoaLogic IP with AMBA AHB3-Lite interfaces☆19Updated last year
- Generic AXI master stub☆19Updated 11 years ago
- Hamming ECC Encoder and Decoder to protect memories☆34Updated last year
- Fork of OpenCores jpegencode with Cocotb testbench☆45Updated 10 years ago
- The ParaNut Processor - Highly Parallel and More Than Just a CPU Core☆36Updated 2 years ago
- Wavious Wlink☆12Updated 4 years ago
- ☆11Updated 6 years ago
- AXI4-Compatible Verilog Cores, along with some helper modules.☆17Updated 5 years ago
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆21Updated 2 years ago
- ☆32Updated 2 weeks ago
- ☆33Updated 3 years ago
- Backup: Library implementing a C TLM-2 style to bridge C models to SystemC TLM-2.0 (C++) from GreenSocs (https://git.greensocs.com/tlm/tl…☆19Updated 7 years ago
- FGPU is a soft GPU architecture general purpose computing☆61Updated 5 years ago
- A small 32-bit implementation of the RISC-V architecture☆32Updated 5 years ago
- Ethernet MAC 10/100 Mbps☆31Updated 4 years ago
- Open FPGA Modules☆24Updated last year
- Network on Chip for MPSoC☆28Updated 2 weeks ago
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆32Updated 9 years ago
- ☆19Updated 5 years ago