Alternatives and similar repositories for ARM9-compatible-soft-CPU-core

Users that are interested in ARM9-compatible-soft-CPU-core are comparing it to the libraries listed below

• AleksandarKostovic / Riscy-SoC
  Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog
  ☆81Updated 5 years ago
• risclite / R8051
  8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.
  ☆187Updated 5 years ago
• ultraembedded / core_uriscv
  Another tiny RISC-V implementation
  ☆58Updated 4 years ago
• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆85Updated 5 years ago
• olgirard / openmsp430
  The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.
  ☆65Updated 7 years ago
• rbarzic / nanorv32
  A small 32-bit implementation of the RISC-V architecture
  ☆32Updated 5 years ago
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆87Updated 2 years ago
• PulseRain / Reindeer
  PulseRain Reindeer - RISCV RV32I[M] Soft CPU
  ☆128Updated 5 years ago
• BrianHGinc / BrianHG-DDR3-Controller
  DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…
  ☆80Updated last year
• chsasank / ARM7
  Implemetation of pipelined ARM7TDMI processor in Verilog
  ☆90Updated 7 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated 5 months ago
• lajanugen / 8051
  FPGA implementation of the 8051 Microcontroller (Verilog)
  ☆49Updated 10 years ago
• ataradov / riscv
  Verilog implementation of a RISC-V core
  ☆123Updated 6 years ago
• freecores / uart16550
  UART 16550 core
  ☆37Updated 11 years ago
• ultraembedded / exactstep
  Instruction set simulator for RISC-V, MIPS and ARM-v6m
  ☆101Updated 3 years ago
• freecores / 8051
  8051 core
  ☆106Updated 11 years ago
• freecores / turbo8051
  turbo 8051
  ☆29Updated 7 years ago
• sergachev / spi_mem_programmer
  Small (Q)SPI flash memory programmer in Verilog
  ☆64Updated 2 years ago
• ultraembedded / core_dvi_framebuffer
  Minimal DVI / HDMI Framebuffer
  ☆83Updated 5 years ago
• ultraembedded / core_soc
  Basic Peripheral SoC (SPI, GPIO, Timer, UART)
  ☆65Updated 5 years ago
• freecores / usbhostslave
  USB 1.1 Host and Function IP core
  ☆23Updated 11 years ago
• XUANTIE-RV / opene906
  OpenXuantie - OpenE906 Core
  ☆139Updated last year
• openrisc / or1ksim
  The OpenRISC 1000 architectural simulator
  ☆76Updated 3 months ago
• aignacio / riscv_verilator_model
  RISCV model for Verilator/FPGA targets
  ☆53Updated 5 years ago
• sunyata000 / PODES-M0O
  A VerilogHDL MCU Core based ARMv6 Cortex-M0
  ☆21Updated 5 years ago
• fjullien / jtag_vpi
  TCP/IP controlled VPI JTAG Interface.
  ☆67Updated 7 months ago
• www-asics-ws / usb2_dev
  USB 2.0 Device IP Core
  ☆68Updated 7 years ago
• tommythorn / yarvi
  Yet Another RISC-V Implementation
  ☆96Updated 11 months ago
• ultraembedded / riscv_soc
  Basic RISC-V Test SoC
  ☆140Updated 6 years ago
• freecores / sparc64soc
  OpenSPARC-based SoC
  ☆69Updated 11 years ago