jiegec / apple-pmu
Dump Apple PMU counter definitions from `/usr/share/kpep` in macOS
☆13Updated last month
Alternatives and similar repositories for apple-pmu:
Users that are interested in apple-pmu are comparing it to the libraries listed below
- Generate Linux Perf event tables for Apple Silicon☆12Updated 6 months ago
- Microarchitecture diagrams of several CPUs☆35Updated 2 weeks ago
- Implements kernels with RISC-V Vector☆22Updated 2 years ago
- ☆18Updated 5 years ago
- A Flexible Cache Architectural Simulator☆14Updated 4 months ago
- CPU micro benchmarks☆55Updated 2 weeks ago
- This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…☆21Updated 2 months ago
- (WIP) A relatively simple pipelined RISC-V core, written in Bluespec SystemVerilog☆12Updated 3 years ago
- A hand-written recursive decent Verilog parser.☆11Updated 2 years ago
- Lower chisel memories to SRAM macros☆12Updated last year
- Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.☆13Updated 3 weeks ago
- An SoC with multiple RISC-V IMA processors.☆19Updated 6 years ago
- Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards☆18Updated 5 months ago
- Fuzzing General-Purpose Hardware Designs with Software Fuzzers☆16Updated this week
- The repo contains the SPMP architectural specification, which includes capabilities like access control of read/write/execute requests by…☆16Updated last week
- Port of original MemTest86+ v5.1 to other architectures (RISC-V for now)☆15Updated 5 years ago
- ☆15Updated 2 years ago
- The 'missing header' for Chisel☆20Updated last month
- ☆14Updated last year
- Wrappers for open source FPU hardware implementations.☆31Updated last year
- RTL blocks compatible with the Rocket Chip Generator☆16Updated last month
- Run Rocket Chip on VCU128☆30Updated 5 months ago
- Header-only C/C++ static keys to avoid the overhead of conditional branches☆13Updated last year
- Paging Debug tool for GDB using python☆13Updated 2 years ago
- A Symmetric Multiprocessing OS Kernel over RISC-V☆30Updated 2 years ago
- ☆17Updated 3 years ago
- What if everything is a io_uring?☆16Updated 2 years ago
- ☆23Updated last year
- A simple utility for doing RISC-V HPM perf monitoring.☆16Updated 8 years ago
- User-mode trap-and-emulate hypervisor for RISC-V☆13Updated 3 years ago