A repository that implements Tywaves: enabling a type-based waveform debugging for Chisel and Tydi-Chisel. Mapping from Chisel level code to values dumped by simulators is now possible thanks to Tywaves!
☆61Oct 27, 2024Updated last year
Alternatives and similar repositories for tywaves-chisel
Users that are interested in tywaves-chisel are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆20Mar 3, 2026Updated 4 months ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- A Scala library for Context-Dependent Environments☆50Apr 25, 2024Updated 2 years ago
- CIRCT and Yosys interoperability, demonstrated with CHISEL☆17Feb 3, 2026Updated 5 months ago
- The 'missing header' for Chisel☆24Feb 5, 2026Updated 5 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Hardware generator debugger☆79Feb 12, 2024Updated 2 years ago
- A command-line tool for displaying vcd waveforms.☆70Feb 19, 2024Updated 2 years ago
- high-performance RTL simulator☆195Updated this week
- SimCommand is a library for writing high-performance RTL testbenches with simulation threads in Scala using chiseltest.☆15Aug 30, 2023Updated 2 years ago
- ☆12May 20, 2021Updated 5 years ago
- wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.☆135Jun 15, 2026Updated last month
- ☆45Dec 5, 2025Updated 7 months ago
- ☆27Dec 4, 2025Updated 7 months ago
- MCP server to read waveform files☆43May 4, 2026Updated 2 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- A fault-injection framework using Chisel and FIRRTL☆39Sep 17, 2025Updated 10 months ago
- ☆20Mar 18, 2022Updated 4 years ago
- A dynamic verification library for Chisel.☆163Nov 9, 2024Updated last year
- The batteries-included testing and formal verification library for Chisel-based RTL designs.☆234Aug 19, 2024Updated last year
- (System)Verilog to Chisel translator☆121May 20, 2022Updated 4 years ago
- An example of on-boarding a PIO block in with duh and wake☆12Nov 18, 2020Updated 5 years ago
- A collection of examples showcasing PyCDE and Mini RISC-V implementation.☆10Jun 19, 2026Updated last month
- ☆45Mar 31, 2025Updated last year
- A Z80 CPU implemented in Chisel.☆11Sep 20, 2020Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl☆11Nov 3, 2021Updated 4 years ago
- A template project for beginning new Chisel work☆704Feb 24, 2026Updated 4 months ago
- Chisel Fixed-Point Arithmetic Library☆18Dec 15, 2025Updated 7 months ago
- Wavious Wlink☆12Oct 28, 2021Updated 4 years ago
- ☆29Jun 17, 2026Updated last month
- Library to compile Chisel circuits using LLVM/MLIR (CIRCT)☆71Mar 2, 2023Updated 3 years ago
- 21st century electronic design automation tools, written in Rust.☆37Updated this week
- ☆10Oct 8, 2021Updated 4 years ago
- Iron: selectively turn RISC-V binaries into hardware☆23Jun 8, 2023Updated 3 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆21Apr 8, 2026Updated 3 months ago
- The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely…☆26Sep 26, 2024Updated last year
- Implementation of Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning in Chisel HDL. To know more, …☆17Oct 9, 2021Updated 4 years ago
- A collection of datapath circuit design and verification benchmarks☆19Jul 9, 2026Updated last week
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆25Feb 1, 2020Updated 6 years ago
- A Chisel RTL generator for network-on-chip interconnects☆233Nov 7, 2025Updated 8 months ago
- WAL enables programmable waveform analysis.☆182May 31, 2026Updated last month