21st century electronic design automation tools, written in Rust.
☆37Oct 13, 2026Updated 2 weeks ago
Alternatives and similar repositories for substrate2
Users that are interested in substrate2 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A programming language for writing constraint-based integrated circuit layout generators☆17Updated this week
- ☆18Mar 11, 2026Updated 7 months ago
- ☆15Sep 30, 2026Updated last month
- An Open-Source Full-Custom Silicon Compiler for High-Performance FPGA Fabrics☆21Aug 25, 2026Updated 2 months ago
- ☆13Aug 17, 2026Updated 2 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Interchange formats for chip design.☆40Feb 15, 2026Updated 8 months ago
- Yosys RTLIL dialect for MLIR☆25Jun 12, 2025Updated last year
- Equivalence Verification Checking for Code Transformation via Equality Saturation☆13Jun 1, 2026Updated 4 months ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 3 years ago
- FastPoly: An Efficient Polynomial Package for the Verification of Integer Arithmetic Circuits☆14Aug 5, 2025Updated last year
- ☆20Oct 2, 2026Updated 3 weeks ago
- A configurable SRAM generator☆72Oct 20, 2026Updated last week
- Very tiny embeddable Tcl-like language in safe Rust☆12Feb 13, 2025Updated last year
- SKY130 SRAM macros generated by SRAM 22☆27Sep 24, 2026Updated last month
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Rust bindings for CIRCT☆19Apr 20, 2024Updated 2 years ago
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆14Mar 27, 2025Updated last year
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- BTOR2 MLIR project☆26Jan 17, 2024Updated 2 years ago
- ☆16Jan 25, 2026Updated 9 months ago
- Native Rust implementation of the FST waveform format from GTKWave.☆15Oct 13, 2026Updated 2 weeks ago
- High level synthesis language for hardware design☆106Updated this week
- ☆18Jul 12, 2024Updated 2 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- APS: An open-source toolchain towards agile processor specialization based on MLIR☆22Jan 17, 2026Updated 9 months ago
- Zhuofan Lin and Shiju Lin, "GPU-Accelerated Efficient Transduction for Logic Optimization", Design, Automation & Test in Europe Conferenc…☆14Sep 19, 2026Updated last month
- wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.☆147Updated this week
- This repo contains introduction of gm/id method and its application to some OTA design examples.☆19Dec 5, 2023Updated 2 years ago
- Website for CS 265☆34Dec 27, 2024Updated last year
- ☆10Sep 29, 2024Updated 2 years ago
- ☆38Oct 4, 2026Updated 3 weeks ago
- ☆16Jul 1, 2025Updated last year
- ☆11Feb 14, 2020Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- [NeurIPS 2026] Veri-Sure: Multi-Agent RTL Code Generation with Temporal Tracing, Slicing and Formal Verification☆28Updated this week
- Logic circuit analysis and optimization☆53Feb 2, 2026Updated 8 months ago
- Integrated Circuit Layout☆63Feb 25, 2025Updated last year
- Gate-level visualization generator for SKY130-based chip designs.☆20Jul 22, 2021Updated 5 years ago
- Hardware Description Library☆96Feb 17, 2026Updated 8 months ago
- RTeAAL Sim: Using Tensor Algebra to Represent and Accelerate RTL Simulation -- ASPLOS'26☆18Mar 31, 2026Updated 6 months ago
- ☆17Mar 26, 2025Updated last year