21st century electronic design automation tools, written in Rust.
☆36Apr 16, 2026Updated 2 weeks ago
Alternatives and similar repositories for substrate2
Users that are interested in substrate2 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆15Dec 9, 2025Updated 4 months ago
- A configurable SRAM generator☆61Mar 4, 2026Updated last month
- An Open-Source Silicon Compiler for Reduced-Complexity Reconfigurable Fabrics☆15Updated this week
- SKY130 SRAM macros generated by SRAM 22☆21Aug 19, 2025Updated 8 months ago
- Interchange formats for chip design.☆38Feb 15, 2026Updated 2 months ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- ☆15Jan 25, 2026Updated 3 months ago
- Native Rust implementation of the FST waveform format from GTKWave.☆14Apr 13, 2026Updated 2 weeks ago
- ☆18Jul 12, 2024Updated last year
- ☆19Jan 2, 2026Updated 3 months ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- Analyze experimental data with Programming by Navigation☆17Updated this week
- Website for CS 265☆33Dec 27, 2024Updated last year
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆13Mar 27, 2025Updated last year
- ☆17Mar 26, 2025Updated last year
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.☆123Apr 13, 2026Updated 2 weeks ago
- BTOR2 MLIR project☆26Jan 17, 2024Updated 2 years ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Dec 3, 2024Updated last year
- design and verification of asynchronous circuits☆48Feb 27, 2026Updated 2 months ago
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆42Jul 17, 2024Updated last year
- Gate-level visualization generator for SKY130-based chip designs.☆20Jul 22, 2021Updated 4 years ago
- A Hardware Description Language that doesn't make you want to pull your hair out | read-only mirror of https://gitlab.com/spade-lang/spad…☆58Apr 23, 2026Updated last week
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year
- ☆13Jan 20, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- Python interface for Cadence Spectre☆28Feb 17, 2026Updated 2 months ago
- A fork of Yosys that integrates the CellIFT pass☆13Apr 21, 2026Updated last week
- Logic circuit analysis and optimization☆48Feb 2, 2026Updated 2 months ago
- 🦀 No-nonsense hardware testing/simulation in Rust 🛠️ | Verilog, Spade, Veryl☆94Mar 22, 2026Updated last month
- SystemVerilog frontend for Yosys☆215Apr 22, 2026Updated last week
- Integrated Circuit Layout☆61Feb 25, 2025Updated last year
- Parametrized RTL benchmark suite☆26Feb 6, 2026Updated 2 months ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆29Dec 23, 2025Updated 4 months ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- Fearless hardware design☆201Aug 20, 2025Updated 8 months ago
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆27Apr 9, 2025Updated last year
- This repo contains introduction of gm/id method and its application to some OTA design examples.☆19Dec 5, 2023Updated 2 years ago
- A unified simulation platform that combines hardware and software, enabling pre-silicon, full-stack, closed-loop evaluation of your robot…☆47Apr 9, 2025Updated last year
- RISCV Core written in Calyx☆17Aug 16, 2024Updated last year
- Implementation of Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning in Chisel HDL. To know more, …☆17Oct 9, 2021Updated 4 years ago
- ☆27Mar 5, 2026Updated last month