Alternatives and similar repositories for ICLAB2022FALL:

Users that are interested in ICLAB2022FALL are comparing it to the libraries listed below

• XDEv11 / ICLAB-2022-FALL
  ☆31Updated last year
• krz-max / Digital-Circuits-and-Systems
  [NYCU 2021 Spring] Digital Circuits and Systems
  ☆16Updated last year
• derek8955 / ic_contest
  IC Contest
  ☆28Updated last year
• aelog134256 / iclab2024fall
  ☆23Updated 3 months ago
• hankshyu / ICLab-2023
  Spring 2023 NYCU (prev. NCTU) Integrated Circuit Design Laboratory (ICLab)
  ☆104Updated 5 months ago
• NCTUTHEBEST / ICLAB_2023_FALL
  紀錄一下自己寫過的所有Lab
  ☆24Updated last year
• kevin861222 / NYCU-ICLAB-2024-Spring
  超詳細 ICLAB 2024 Spring 修課心得 & 修課指南，含資源整理
  ☆57Updated 2 weeks ago
• Ni-ChiTing / IC_contest_cell_based_design
  ☆11Updated 3 years ago
• HsuChiChen / nycu-iclab-2023-fall
  交通大學iclab 2023 fall
  ☆22Updated 4 months ago
• max2468tw / IC_Lab
  NCTU 2018 Spring Integrated Circuit Design Laboratory
  ☆24Updated 6 years ago
• mirkat1206 / 2021_Spring_NCTU_ICLAB
  NCTU 2021 Spring Integrated Circuit Design Laboratory
  ☆173Updated last year
• albertfan1120 / NTU_CVSD_2021
  Computer-Aided VLSI System Design
  ☆17Updated 3 months ago
• max410011 / IC-Contest
  ☆15Updated last year
• lol0963332320 / ICLAB
  ☆10Updated last year
• hankshyu / Digital-Design
  Hardware Description Language on FPGA
  ☆9Updated last year
• ypctw / ICDC-undergrad
  Integrated Circuit Design Contest (ICDC) - 大學院校積體電路設計競賽
  ☆12Updated 2 years ago
• bol-edu / HLS-SOC-Discussions
  Discussion Forum for High-Level Synthesis (HLS) Courses in Taiwan.
  ☆48Updated last year
• kerryliukk / NTHU-ICLAB
  清華大學 | 積體電路設計實驗 (IC LAB) | 110上
  ☆31Updated 2 years ago
• laplaceyc / VLSI_Design-Implementation
  This repo is "NTHU VLSI System Design and Implementation" course project.
  ☆13Updated 7 years ago
• asfhiolNick / NTU_CVSD_202201
  楊家驤老師的"電腦輔助積體電路系統設計"作業(CVSD)
  ☆29Updated 4 months ago
• zli87 / Wishbone-to-I2C-bus-controller-IP-Verification
  ASIC Verification at 2022 Spring. This course only use SystemVerilog, did not use UVM.
  ☆18Updated 2 years ago
• bol-edu / caravel-soc_fpga-lab
  ☆15Updated last month
• dumpo / my_verilog_projects
  数字IC秋招项目、手撕代码
  ☆34Updated 9 months ago
• boaaaang / CNN-Implementation-in-Verilog
  Convolutional Neural Network RTL-level Design
  ☆44Updated 3 years ago
• suchuankai / CNN-hw-accelerator
  CNN hardware accelerator to accelerate quantized LeNet-5 model
  ☆28Updated last year
• prajwalgekkouga / AHB-to-APB-Bridge
  The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…
  ☆54Updated 2 years ago
• kumarrishav14 / AXI
  VIP for AXI Protocol
  ☆122Updated 2 years ago
• 02stevenyang850527 / CVSD
  Computer-aided VLSI System design, EEE 5022, National Taiwan University, 2018 Spring
  ☆17Updated 6 years ago
• zhangzek / 3x3_matrix_Systolic_Array_multiplier
  3×3脉动阵列乘法器
  ☆38Updated 5 years ago