Alternatives and similar repositories for bag

Users that are interested in bag are comparing it to the libraries listed below

• idea-fasoc / fasoc
  ☆55Updated last year
• stineje / CharLib
  Open-source repository for a standard-cell library characterizer using complete open-source tools
  ☆37Updated last month
• mabrains / OpenAnalogDesign
  Open Analog Design Environment
  ☆24Updated 2 years ago
• efabless / cace
  Circuit Automatic Characterization Engine
  ☆51Updated 7 months ago
• Vlsir / Vlsir
  Interchange formats for chip design.
  ☆31Updated 4 months ago
• efabless / caravel_user_project_analog
  ☆49Updated 7 months ago
• RTimothyEdwards / netgen
  Netgen complete LVS tool for comparing SPICE or verilog netlists
  ☆122Updated this week
• RTimothyEdwards / qrouter
  Qrouter detail router for digital ASIC designs
  ☆56Updated 5 months ago
• asyncvlsi / AMC
  AMC: Asynchronous Memory Compiler
  ☆50Updated 5 years ago
• dan-fritchman / Hdl21
  Hardware Description Library
  ☆82Updated 5 months ago
• USCPOSH / AMPSE
  This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…
  ☆25Updated 2 years ago
• efabless / mpw_precheck
  ☆43Updated 6 months ago
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆40Updated 2 years ago
• sgherbst / msdsl
  Automatic generation of real number models from analog circuits
  ☆43Updated last year
• MatBucher / ekv3model
  ☆19Updated last year
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆50Updated 2 years ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• patrickschulz / openPCells
  Parametric layout generator for digital, analog and mixed-signal integrated circuits
  ☆56Updated this week
• hdl / conda-eda
  Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.
  ☆102Updated 7 months ago
• laurentc2 / SKY130_for_KLayout
  KLayout technology files for Skywater SKY130
  ☆41Updated 2 years ago
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆30Updated last year
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆50Updated 4 months ago
• ucb-art / BAG2_cds_ff_mpt
  BAG2 workspace for fake PDK (cds_ff_mpt)
  ☆59Updated 5 years ago
• vsdip / vsdStdCellCharacterizer_sky130
  ☆20Updated 3 years ago
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆39Updated 6 years ago
• laurentc2 / ASAP7_for_KLayout
  KLayout technology files for ASAP7 FinFET educational process
  ☆21Updated 2 years ago
• d-m-bailey / cvc
  CVC: Circuit Validity Checker. Check for errors in CDL netlist.
  ☆26Updated 2 months ago
• scale-lab / PVTsensors
  Designs for Process-Voltage-Temperature (PVT) Sensors with MCU
  ☆23Updated 5 years ago
• efabless / chipignite-resources
  ☆83Updated 2 years ago
• mabrains / Analog_blocks
  Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.
  ☆28Updated 3 years ago