kouroshHakha / bag_deep_cktLinks
genetic and neural net optimization for circuit design
☆18Updated 3 years ago
Alternatives and similar repositories for bag_deep_ckt
Users that are interested in bag_deep_ckt are comparing it to the libraries listed below
Sorting:
- Training a deep FCN network in PyTorch to route circuit layouts☆68Updated 3 years ago
- Deep Reinforcement Learning of Analog Circuit Designs☆128Updated 2 years ago
- DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)☆115Updated 2 years ago
- Collection of Papers and Trials on Deep Learning to aid EE design☆45Updated 5 years ago
- ☆17Updated 3 years ago
- Analog Placement Quality Prediction☆25Updated 2 years ago
- MLCAD 2020: Reinforcement for logic optimization sequence exploration☆29Updated 5 years ago
- [ICML 2019] Circuit-GNN: Graph Neural Networks for Distributed Circuit Design http://circuit-gnn.csail.mit.edu/☆111Updated 2 years ago
- discrete gate sizing☆14Updated 5 years ago
- ☆32Updated 2 years ago
- ☆21Updated 3 years ago
- Simple Python interface for ABC☆26Updated 2 years ago
- Benchmark Generator for Global Routing☆12Updated 6 years ago
- ☆18Updated 4 years ago
- EDA physical synthesis optimization kit☆64Updated 2 years ago
- BAG2 workspace for fake PDK (cds_ff_mpt)☆59Updated 5 years ago
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆53Updated 11 months ago
- REST, a reinforcement learning framework for constructing rectilinear Steiner Minimum tree (RSMT)☆59Updated 3 years ago
- Circuit release of the MAGICAL project☆40Updated 6 years ago
- IronMan+alpha: Graph Neural Network and Reinforcement Learning in High-Level Synthesis☆27Updated 3 years ago
- This repo contains the code that runs RL+GNN to optimize LDOs in SKY130 process.☆46Updated last year
- Combination of Analog Circuit Sizing and DL.☆18Updated 2 years ago
- ☆13Updated 3 years ago
- Open Circuit Benchmark OCB and source code for CktGNN (https://openreview.net/forum?id=NE2911Kq1sp).☆74Updated 2 years ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆141Updated 5 months ago
- ☆67Updated this week
- Official implementation of NeurIPS'24 paper "Reinforcement Learning Policy as Macro Regulator Rather than Macro Placer".☆19Updated 4 months ago
- Awesome machine learning for logic synthesis☆30Updated 3 years ago
- Analog IC symmetry extraction benchmark of AncstrGNN☆10Updated last year
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 3 years ago