iic-jku / IIC-RALF
Reinforcement learning assisted analog layout design flow.
☆11Updated 3 months ago
Related projects ⓘ
Alternatives and complementary repositories for IIC-RALF
- repository for a bandgap voltage reference in SKY130 technology☆34Updated last year
- Sandbox for experimenting with Ngspice and open PDKs in Google Colab☆21Updated 5 months ago
- submission repository for efabless mpw6 shuttle☆30Updated 10 months ago
- PLL Designs on Skywater 130nm MPW☆20Updated 11 months ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆38Updated 3 months ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆26Updated 2 years ago
- COCOA: Collaborative Compendium on Analog Integrated Circuits☆11Updated 2 months ago
- Circuit Automatic Characterization Engine☆45Updated last week
- MOSIS MPW Test Data and SPICE Models Collections☆26Updated 4 years ago
- A C++ VLSI circuit schematic and layout database library☆13Updated 4 months ago
- Skywaters 130nm Klayout PDK☆19Updated last month
- Analog and power building blocks for sky130 pdk☆20Updated 3 years ago
- ☆29Updated 2 months ago
- This repository is for (pre-)release versions of the Revolution EDA.☆35Updated 2 weeks ago
- A python3 gm/ID starter kit☆39Updated 2 months ago
- Skywater 130nm Klayout Device Generators PDK☆29Updated 4 months ago
- Open Analog Design Environment☆22Updated last year
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆23Updated 3 years ago
- Open source process design kit for 28nm open process☆45Updated 6 months ago
- Parasitic capacitance analysis of foundry metal stackups☆10Updated 2 months ago
- ☆17Updated 7 months ago
- 12 bit SAR ADC IP in Skywater 130 nm PDK☆14Updated 5 months ago
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆51Updated 7 years ago
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆20Updated 5 months ago
- Verilog-A simulation models☆53Updated last week
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆21Updated last year
- Characterizer☆21Updated 3 months ago
- A Spice simulation interface☆9Updated 2 years ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆39Updated 4 months ago
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆24Updated last year