An OASIS and GDS2 (chip layout format) binary dump tool for debugging
☆46Dec 5, 2017Updated 8 years ago
Alternatives and similar repositories for dump_oas_gds2
Users that are interested in dump_oas_gds2 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- gaw3-20200922 fork with patches to improve remote commands sent from xschem to display waveforms☆18Mar 28, 2025Updated last year
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆135Apr 23, 2023Updated 3 years ago
- A single-script repo for a script to turn a calibre layer file to a KLayout .lyp file☆15Sep 3, 2018Updated 7 years ago
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆58Jun 30, 2017Updated 9 years ago
- This library is a low level parser for the GDSII file format.☆36Jun 25, 2017Updated 9 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆61Aug 7, 2022Updated 3 years ago
- Tool to fetch and parse data about Efabless MPW projects☆15Jan 10, 2023Updated 3 years ago
- Custom IC Creator (ciccreator) is a compiler that takes in a object definition file (JSON), a SPICE file, and a design rule file and outp…☆42Jun 22, 2025Updated last year
- A C++ VLSI circuit schematic and layout database library☆16Jul 1, 2024Updated 2 years ago
- This library is a low level parser for the OpenAccess file format.☆16Jun 24, 2017Updated 9 years ago
- KLayout Main Sources☆1,134Updated this week
- repository for a bandgap voltage reference in SKY130 technology☆44Jan 20, 2023Updated 3 years ago
- Gdstk (GDSII Tool Kit) is a C++/Python library for creation and manipulation of GDSII and OASIS files.☆484Mar 13, 2026Updated 3 months ago
- Reads a Cadence techfile into KLayout and produces layer properties from it☆31Oct 22, 2023Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- LunaPnR is a place and router for integrated circuits☆48Feb 11, 2026Updated 5 months ago
- BAG framework☆44Jul 24, 2024Updated last year
- Python interface for Cadence Spectre☆28Feb 17, 2026Updated 4 months ago
- This package provides a gnucap based qucsator implementation.☆16May 13, 2026Updated last month
- GDS3D is an application that can interpret so called IC layouts and render them in 3D. The program accepts standard GDSII files as input …☆261Aug 20, 2024Updated last year
- C++ library and command-line utility for reading GDSII geometry files☆56Nov 12, 2020Updated 5 years ago
- Repository containing common Makefiles for setting up conda environments.☆10Feb 10, 2023Updated 3 years ago
- A python library for ngspice☆15Apr 13, 2026Updated 2 months ago
- A tiny Python package to parse spice raw data files.☆54Dec 26, 2022Updated 3 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Intel's Analog Detailed Router☆43Jul 18, 2019Updated 6 years ago
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆37Apr 9, 2026Updated 3 months ago
- 9 track standard cells for GF180MCU provided by GlobalFoundries.☆19Dec 5, 2022Updated 3 years ago
- An innovative Verilog-A compiler - reloaded☆43Jun 19, 2026Updated 3 weeks ago
- KLayout technology files for FreePDK45☆25Jun 12, 2021Updated 5 years ago
- IPKISS is a parametric design framework focused (but not limited) to Photonic circuit design, originally constructed at Ghent University …☆32Feb 3, 2022Updated 4 years ago
- A simple plugin for managing tabs in neovim☆10Apr 27, 2023Updated 3 years ago
- LAYout with Gridded Objects v2☆69Jul 4, 2026Updated last week
- Translates GDSII into HTML/JS that can be viewed in WebGL-capable web browsers.☆61Aug 23, 2020Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Interchange formats for chip design.☆39Feb 15, 2026Updated 4 months ago
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆135Jun 29, 2026Updated last week
- ☆21Apr 19, 2024Updated 2 years ago
- Qrouter detail router for digital ASIC designs☆57Nov 13, 2025Updated 7 months ago
- Integrated Circuit Layout☆62Feb 25, 2025Updated last year
- Hardware Design Tool - Mixed Signal Simulation with Verilog☆93Dec 18, 2024Updated last year
- This is the XDM netlist converter, used to convert PSPICE and HSPICE netists into Xyce format.☆25Feb 15, 2024Updated 2 years ago