Alternatives and similar repositories for dump_oas_gds2

Users that are interested in dump_oas_gds2 are comparing it to the libraries listed below

• EDDRSoftware / gdsFileParser
  This library is a low level parser for the GDSII file format.
  ☆36Updated 8 years ago
• HomerReid / libGDSII
  C++ library and command-line utility for reading GDSII geometry files
  ☆48Updated 4 years ago
• purdue-onchip / gds2Para
  GDSII File Parsing, IC Layout Analysis, and Parameter Extraction
  ☆124Updated 2 years ago
• EDDRSoftware / oaFileParser
  This library is a low level parser for the OpenAccess file format.
  ☆15Updated 8 years ago
• OpenTimer / Parser-SPEF
  A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
  ☆56Updated 3 years ago
• skuep / GDS3D
  Fork from https://sourceforge.net/projects/gds3d
  ☆68Updated last year
• RTimothyEdwards / qrouter
  Qrouter detail router for digital ASIC designs
  ☆56Updated 5 months ago
• yuchsiao / caplet
  GDS visualization, geometry analysis, and parallelized capacitance extraction at field-solver accuracy. MS thesis project.
  ☆23Updated last year
• laurentc2 / FreePDK45_for_KLayout
  KLayout technology files for FreePDK45
  ☆22Updated 4 years ago
• dan-fritchman / Netlist
  Parsing and generating popular formats of circuit netlist
  ☆36Updated 2 years ago
• capn-freako / PyAMI
  Python package for IBIS-AMI model development and testing
  ☆30Updated last month
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆39Updated 6 years ago
• jonpry / Pill
  Skill language interpreter
  ☆68Updated 5 years ago
• bluecheetah / cbag
  A C++ VLSI circuit schematic and layout database library
  ☆14Updated last year
• bluecheetah / bag
  BAG framework
  ☆41Updated last year
• patrickschulz / openPCells
  Parametric layout generator for digital, analog and mixed-signal integrated circuits
  ☆56Updated this week
• sgherbst / msdsl
  Automatic generation of real number models from analog circuits
  ☆43Updated last year
• clin99 / awesome-eda
  ☆93Updated 6 years ago
• cascode-labs / virtue
  A Python and SKILL Framework for Cadence Virtuoso
  ☆41Updated last year
• mdmfernandes / smoc
  A stochastic circuit optimizer for Cadence Virtuoso, using the NSGA-II genetic algorithm.
  ☆12Updated 3 years ago
• The-OpenROAD-Project / OpenRCX
  ☆22Updated 4 years ago
• RTimothyEdwards / netgen
  Netgen complete LVS tool for comparing SPICE or verilog netlists
  ☆122Updated last week
• The-OpenROAD-Project / OpenDB
  Database and Tool Framework for EDA
  ☆117Updated 4 years ago
• The-OpenROAD-Project / TritonCTS
  Source codes and calibration scripts for clock tree synthesis
  ☆40Updated 5 years ago
• trilomix / GDS3D
  GDS3D is an application that can interpret so called IC layouts and render them in 3D. The program accepts standard GDSII files as input …
  ☆230Updated last year
• Coloquinte / Coloquinte_placement
  An analytical VLSI placer
  ☆28Updated 3 years ago
• aolofsson / IDEA
  ☆33Updated 5 years ago
• mikaeloduh / gds2ascii-tool-project
  GDS to ASCII Converter
  ☆21Updated 2 months ago
• eugmes / python-gdsii
  GDSII manipulation libaray
  ☆17Updated last year
• wulffern / aicex
  Files for Advanced Integrated Circuits
  ☆29Updated this week