MOSIS MPW Test Data and SPICE Models Collections
☆42Apr 2, 2020Updated 6 years ago
Alternatives and similar repositories for CMOS-SPICE-Model-Collections
Users that are interested in CMOS-SPICE-Model-Collections are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Source code for the Paper: "Deep Reinforcement Learning for Analog Circuit Sizing with an Electrical Design Space and Sparse Rewards"☆15Sep 12, 2022Updated 3 years ago
- Python interface for Cadence Spectre☆28Feb 17, 2026Updated 3 months ago
- A C++ VLSI circuit schematic and layout database library☆15Jul 1, 2024Updated last year
- COCOA: Collaborative Compendium on Analog Integrated Circuits☆28Jan 14, 2026Updated 5 months ago
- BAG framework☆44Jul 24, 2024Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆21Apr 19, 2024Updated 2 years ago
- Interchange formats for chip design.☆39Feb 15, 2026Updated 4 months ago
- Primitives for GF180MCU provided by GlobalFoundries.☆13Jul 6, 2025Updated 11 months ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆52May 28, 2026Updated 2 weeks ago
- Donald Amundson's Python interface to OpenAccess IC design data API☆18Apr 23, 2010Updated 16 years ago
- SKILL / SKILL++ Syntax highlighting for vim☆12Nov 16, 2021Updated 4 years ago
- This library is a low level parser for the OpenAccess file format.☆16Jun 24, 2017Updated 8 years ago
- Skill language interpreter☆73Aug 24, 2020Updated 5 years ago
- Sandbox for experimenting with Ngspice and open PDKs in Google Colab☆31Jun 5, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Qrouter detail router for digital ASIC designs☆57Nov 13, 2025Updated 7 months ago
- Library of componentes for PySpice☆13Oct 15, 2019Updated 6 years ago
- A stochastic circuit optimizer for Cadence Virtuoso, using the NSGA-II genetic algorithm.☆14Dec 12, 2021Updated 4 years ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆80Jun 5, 2026Updated last week
- Advanced Integrated Circuits 2024☆24Nov 16, 2024Updated last year
- 32-bit RISC-V microcontroller☆12Sep 11, 2021Updated 4 years ago
- ☆51Feb 7, 2025Updated last year
- UCSD Sizer for leakage/dynamic power recovery, timing recovery☆18Mar 5, 2019Updated 7 years ago
- VLSI placement and routing tool☆17Dec 20, 2025Updated 5 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ADMS is a code generator for some of Verilog-A☆104Nov 28, 2022Updated 3 years ago
- Primitives for GF180MCU provided by GlobalFoundries.☆56Aug 28, 2023Updated 2 years ago
- DATC Robust Design Flow.☆36Jan 21, 2020Updated 6 years ago
- A tiny Python package to parse spice raw data files.☆53Dec 26, 2022Updated 3 years ago
- Online viewer of Xschem schematic files☆32Dec 14, 2025Updated 6 months ago
- ☆32Updated this week
- Intel's Analog Detailed Router☆42Jul 18, 2019Updated 6 years ago
- A python3 gm/ID starter kit☆89May 22, 2026Updated 3 weeks ago
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆26Mar 11, 2023Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design. Documentation is here:☆750Updated this week
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆133Jun 9, 2026Updated last week
- This repo contains the code that runs RL+GNN to optimize LDOs in SKY130 process.☆49Jun 24, 2024Updated last year
- Analog and power building blocks for sky130 pdk☆22Mar 3, 2021Updated 5 years ago
- Fully Open Source FASOC generators built on top of open-source EDA tools☆338Oct 22, 2025Updated 7 months ago
- PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).☆495May 31, 2023Updated 3 years ago
- ADC Performance Survey (ISSCC & VLSI Circuit Symposium)☆291Mar 16, 2026Updated 3 months ago