☆172Dec 4, 2022Updated 3 years ago
Alternatives and similar repositories for BAG_framework
Users that are interested in BAG_framework are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- BAG2 workspace for fake PDK (cds_ff_mpt)☆62May 20, 2020Updated 6 years ago
- LAYout with Gridded Objects☆35Jun 18, 2020Updated 6 years ago
- BAG framework☆43Jul 24, 2024Updated 2 years ago
- ☆387Aug 18, 2026Updated last week
- Machine Generated Analog IC Layout☆293Apr 24, 2024Updated 2 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- LAYout with Gridded Objects v2☆69Jul 4, 2026Updated last month
- BAG framework☆37Dec 27, 2024Updated last year
- ☆20Mar 29, 2022Updated 4 years ago
- Hdl21 Schematics☆17Jan 24, 2024Updated 2 years ago
- ☆59Sep 30, 2023Updated 2 years ago
- Fully Open Source FASOC generators built on top of open-source EDA tools☆351Oct 22, 2025Updated 10 months ago
- Arbitrary Cell Generator enables parametrized grid-free circuit layout creation☆17Jun 1, 2020Updated 6 years ago
- Deep Reinforcement Learning of Analog Circuit Designs☆134Jun 12, 2023Updated 3 years ago
- BAG (BAG AMS Generator) Primitives Library for SKY130☆22May 16, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆142Jul 7, 2026Updated last month
- A collection of design automation algorithms, methodologies, and tools for electronics/photonics, and emerging eda technologies☆19Apr 1, 2023Updated 3 years ago
- This repository will maintain simulation files, layout files and other relevant files on the SAR ADC worked on in the VSD Summer Online I…☆21Dec 15, 2020Updated 5 years ago
- Intel's Analog Detailed Router☆43Jul 18, 2019Updated 7 years ago
- This repo contains the code that runs RL+GNN to optimize LDOs in SKY130 process.☆50Jun 24, 2024Updated 2 years ago
- A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy an…☆489Updated this week
- Automatic generation of real number models from analog circuits☆49Apr 2, 2024Updated 2 years ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆82Jul 28, 2026Updated last month
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆35Jul 30, 2022Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- pystateye - A Python Implementation of Statistical Eye Analysis and Visualization☆21May 25, 2024Updated 2 years ago
- Hardware Description Library☆96Feb 17, 2026Updated 6 months ago
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆28Mar 11, 2023Updated 3 years ago
- A Python and SKILL Framework for Cadence Virtuoso☆57Dec 13, 2025Updated 8 months ago
- Interchange formats for chip design.☆40Feb 15, 2026Updated 6 months ago
- Gm Id Kit with GUI to Work with Matlab Data file similar to Prof. Boris Murmann's gm/ID Starter Kit☆53May 24, 2020Updated 6 years ago
- Open Analog Design Environment☆26May 19, 2023Updated 3 years ago
- ☆16May 11, 2022Updated 4 years ago
- A seamless python to Cadence Virtuoso Skill interface☆340Mar 23, 2026Updated 5 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- The Xyce™ Parallel Electronic Simulator☆168Aug 10, 2026Updated 2 weeks ago
- genetic and neural net optimization for circuit design☆19Mar 29, 2022Updated 4 years ago
- The implementation of AICircuit: A Multi-Level Dataset and Benchmark for AI-Driven Analog Integrated Circuit Design☆105Jan 28, 2025Updated last year
- AIB Generator: Analog hardware compiler for AIB PHY☆40Aug 22, 2020Updated 6 years ago
- ☆38Updated this week
- This repository is for (pre-)release versions of the Revolution EDA.☆73Aug 20, 2026Updated last week
- [AAAI 2025 Oral] AnalogCoder: Analog Circuit Design via Training-Free Code Generation☆193Feb 22, 2026Updated 6 months ago