Alternatives and similar repositories for laygo2

Users that are interested in laygo2 are comparing it to the libraries listed below

• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆41Updated 2 years ago
• stineje / CharLib
  Open-source repository for a standard-cell library characterizer using complete open-source tools
  ☆43Updated 2 weeks ago
• ucb-art / bag
  BAG framework
  ☆31Updated last year
• laurentc2 / SKY130_for_KLayout
  KLayout technology files for Skywater SKY130
  ☆44Updated 2 years ago
• magical-eda / MAGICAL-CIRCUITS
  Circuit release of the MAGICAL project
  ☆40Updated 5 years ago
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆39Updated 6 years ago
• ashwith / pyMOSChar
  Python port of Prof. Boris Murmann's gm/ID Starter Kit
  ☆54Updated 8 years ago
• ucb-art / BAG2_cds_ff_mpt
  BAG2 workspace for fake PDK (cds_ff_mpt)
  ☆59Updated 5 years ago
• ChrisZonghaoLi / gm_id_gf180mcu
  This repo contains introduction of gm/id method and its application to some OTA design examples.
  ☆18Updated 2 years ago
• ucb-art / BAG_framework
  ☆158Updated 3 years ago
• efabless / cace
  Circuit Automatic Characterization Engine
  ☆51Updated 10 months ago
• patrickschulz / openPCells
  Parametric layout generator for digital, analog and mixed-signal integrated circuits
  ☆66Updated last week
• ChrisZonghaoLi / sky130_ldo_rl
  This repo contains the code that runs RL+GNN to optimize LDOs in SKY130 process.
  ☆46Updated last year
• mabrains / PLL_design
  PLL Designs on Skywater 130nm MPW
  ☆22Updated 2 years ago
• StefanSchippers / xschem_sky130
  XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.
  ☆67Updated last month
• RTimothyEdwards / capiche
  Parasitic capacitance analysis of foundry metal stackups
  ☆15Updated 8 months ago
• mabrains / sky130_klayout_pdk
  Skywater 130nm Klayout Device Generators PDK
  ☆30Updated last year
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆24Updated 4 years ago
• bmurmann / Ngspice-on-Colab
  Sandbox for experimenting with Ngspice and open PDKs in Google Colab
  ☆26Updated last year
• iic-jku / IIC-RALF
  Reinforcement learning assisted analog layout design flow.
  ☆32Updated last year
• gmagno / spyci
  A tiny Python package to parse spice raw data files.
  ☆53Updated 3 years ago
• sscs-ose / sscs-chipathon-2024
  ☆83Updated 11 months ago
• praharshapm / vsdmixedsignalflow
  This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…
  ☆46Updated 5 years ago
• AsFigo / yoYoLint
  SystemVerilog RTL Linter for YoSys
  ☆22Updated last year
• medwatt / gmid
  Python script for generating lookup tables for the gm/ID design methodology and much more ...
  ☆109Updated last month
• ACMmodel / MOSFET_model
  A simple MOSFET model with only 5-DC-parameters for circuit simulation
  ☆49Updated 3 months ago
• USCPOSH / AMPSE
  This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…
  ☆25Updated 2 years ago
• dan-fritchman / Hdl21
  Hardware Description Library
  ☆88Updated 8 months ago
• iic-jku / osic-multitool
  JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
  ☆78Updated 9 months ago
• vsdip / vsdsram_sky130
  ☆43Updated 3 years ago