chipsalliance / silicon-notebooks
☆160Updated last year
Related projects ⓘ
Alternatives and complementary repositories for silicon-notebooks
- ☆293Updated last year
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆291Updated this week
- This repo is a fork of the master OpenLANE repo for us with projects submitted on Efabless Open MPW or chipIgnite shuttles:: OpenLANE is …☆141Updated 5 months ago
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆152Updated last week
- ☆107Updated last year
- The next generation of OpenLane, rewritten from scratch with a modular architecture☆207Updated this week
- Fully Open Source FASOC generators built on top of open-source EDA tools☆241Updated last week
- https://caravel-user-project.readthedocs.io☆183Updated this week
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆63Updated 3 weeks ago
- SystemVerilog synthesis tool☆168Updated this week
- Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.☆295Updated this week
- Hardware Description Library☆69Updated 2 months ago
- Qflow full end-to-end digital synthesis flow for ASIC designs☆192Updated 2 weeks ago
- OpenROAD users should look at this repository first for instructions on getting started☆101Updated 3 years ago
- EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)☆130Updated last week
- Fabric generator and CAD tools☆148Updated this week
- ☆76Updated 2 years ago
- Ariane is a 6-stage RISC-V CPU☆122Updated 4 years ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆133Updated 4 months ago
- Universal Memory Interface (UMI)☆140Updated this week
- IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively s…☆327Updated this week
- Learning to do things with the Skywater 130nm process☆71Updated 4 years ago
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆148Updated 4 years ago
- 8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x mu…☆108Updated 3 years ago
- Raptor end-to-end FPGA Compiler and GUI☆65Updated this week
- ☆115Updated 3 years ago
- ☆44Updated last year
- ☆52Updated last year
- ☆45Updated last month
- FPGA tool performance profiling☆101Updated 8 months ago