strath-sdr / pynq_agcLinks
Demonstration of Automatic Gain Control with PYNQ
☆16Updated 3 years ago
Alternatives and similar repositories for pynq_agc
Users that are interested in pynq_agc are comparing it to the libraries listed below
Sorting:
- An RFSoC Frequency Planner developed using Python.☆31Updated 2 years ago
- RFSoC2x2 board repo for PYNQ☆17Updated 3 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆56Updated 2 years ago
- RFSoC QSFP Data Offload Design with GNU Radio☆25Updated 11 months ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆108Updated 2 years ago
- PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.☆40Updated 2 years ago
- The Strathclyde RFSoC Studio Installer for PYNQ.☆34Updated 2 years ago
- Python productivity for RFSoC platforms☆84Updated 2 weeks ago
- A collection of RFSoC introductory notebooks for PYNQ.☆24Updated 4 years ago
- RFSoC Spectrum Analyser Module on PYNQ.☆87Updated last year
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Updated 3 years ago
- Board repo for the ZCU216 RFSOC☆30Updated 3 years ago
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆58Updated last year
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆124Updated 2 weeks ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆77Updated 2 years ago
- A PYNQ overlay demonstrating AMD RFSoC Multi-Tile Synchronization (MTS).☆31Updated 2 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆40Updated 3 years ago
- HDL code for a complex multiplier with AXI stream interface☆16Updated 2 years ago
- A collection of phase locked loop (PLL) related projects☆112Updated last year
- Open-sourcing the PYNQ & RFSoC workshop materials☆63Updated 5 years ago
- Extensible FPGA control platform☆61Updated 2 years ago
- ☆33Updated 2 years ago
- JESD204B core for Migen/MiSoC☆35Updated 4 years ago
- Various utilities for working with FPGAs☆13Updated 9 years ago
- RTL implementation of components for DVB-S2☆128Updated 2 years ago
- IEEE 802.11 OFDM-based transceiver system☆40Updated 7 years ago
- ChipScoPy (ChipScope Python API) is an open source Python API to the various ChipScope services provided by the TCF-based (Target Communi…☆62Updated this week
- HDL code for a complex multiplier with AXI stream Interface☆13Updated 2 years ago
- Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…☆87Updated 2 years ago
- DVB-S2 LDPC Decoder☆28Updated 11 years ago