Xilinx / Xilinx_Base_Runtime
☆31Updated last year
Related projects ⓘ
Alternatives and complementary repositories for Xilinx_Base_Runtime
- Tutorials on HLS Design☆49Updated 4 years ago
- OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology☆64Updated 2 months ago
- Introductory examples for using PYNQ with Alveo☆48Updated last year
- Distributed Accelerator OS☆60Updated 2 years ago
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆117Updated last year
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆46Updated 3 months ago
- CAPI SNAP Framework Hardware and Software☆109Updated 3 years ago
- ☆46Updated 11 months ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆95Updated last year
- Caribou: Distributed Smart Storage built with FPGAs☆64Updated 6 years ago
- Repo for all activity related to the ODSA Bunch of Wires Specification☆24Updated 9 months ago
- VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs☆41Updated 3 years ago
- OPAE porting to Xilinx FPGA devices.☆38Updated 4 years ago
- Basic Building Blocks (BBB) for OPAE-managed Intel FPGAs☆103Updated 4 months ago
- This store contains Configurable Example Designs.☆42Updated this week
- An example OpenCAPI 3.0 FPGA reference design for accelerator endpoint development☆11Updated 2 years ago
- Networking Overlay on PYNQ☆44Updated 5 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆39Updated 4 years ago
- FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters☆15Updated 3 years ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆50Updated 2 years ago
- AMD OpenNIC driver includes the Linux kernel driver☆55Updated 8 months ago
- Matchlib Connections Library - latency insensitive channels (from NVlabs/matchlib/connections)☆36Updated 2 months ago
- Centaur, a framework for hybrid CPU-FPGA databases☆27Updated 7 years ago
- PCIe library for the Xilinx 7 series FPGAs in the Bluespec language☆72Updated 2 years ago
- This is a Clang tool that parses SystemC models, and synthesizes Verilog from it.☆79Updated last month
- FPGA acceleration of arbitrary precision floating point computations.☆37Updated 2 years ago
- A versatile Wireshark-compatible packet filter, capable of 100G speeds and higher. Also known as FFShark☆45Updated 3 years ago
- This document adopts the method from the XAPP1230 for doing readback capture on Xilinx UltraScale devices and shows how to migrate the sa…☆14Updated 5 years ago
- ⛔ DEPRECATED ⛔ HERO Software Development Kit☆20Updated 2 years ago
- Rodinia Benchmark Suite for OpenCL-based FPGAs☆30Updated last year