☆19Aug 25, 2017Updated 8 years ago
Alternatives and similar repositories for object_detection_on_zynq_mpsoc
Users that are interested in object_detection_on_zynq_mpsoc are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The reference platform described in this report, uses a Xilinx ZYNQ-7000 hardware platform ZC702 as the real-time processing element appl…☆10Aug 22, 2016Updated 9 years ago
- ☆14Mar 13, 2023Updated 3 years ago
- OV7670 Camera Module Initialize with XILINX ZYNQ Driver☆11Oct 22, 2016Updated 9 years ago
- Paper Collection of Deep Learning Hardware Accelerator☆17Jun 2, 2019Updated 6 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆91Nov 25, 2018Updated 7 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Code for the Change-Based Inference Paper (CBinfer)☆10Jan 7, 2019Updated 7 years ago
- A real time Histogram of Oriented Gradients Implementation on FPGA☆32Jul 21, 2018Updated 7 years ago
- Ubuntu 18.04 Desktop for Ultra96/Ultra96-V2☆19Apr 11, 2020Updated 6 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆158Jan 23, 2020Updated 6 years ago
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆19Oct 6, 2019Updated 6 years ago
- We are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA.☆32May 18, 2019Updated 6 years ago
- MTCNN with convolution reprogramed in c☆14Jul 25, 2019Updated 6 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆25Jul 14, 2020Updated 5 years ago
- Mobilenet v1 (3,128,128, alpha=0.25) on STMH7 using STMCube AI☆10Oct 25, 2019Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆115Feb 22, 2021Updated 5 years ago
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28May 11, 2022Updated 3 years ago
- Evaluation of Deep Learning Network for Embedded Systems☆14Jul 27, 2016Updated 9 years ago
- ☆344Jun 16, 2020Updated 5 years ago
- Deploy CNN accelerator in embedded OS using SDSOC and Xilinx Ultrascale+ ZCU102 platform.☆25Jul 12, 2018Updated 7 years ago
- ☆26Nov 4, 2022Updated 3 years ago
- Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs☆49Aug 31, 2017Updated 8 years ago
- ChipScope / ILA using XVC (XIlinx Virtual Cable Over PCIe) with a PR (Partial Reconfiguration) design Example.☆14Jun 1, 2017Updated 8 years ago
- Multiple scale KCF tracker (matlab code)☆10Jun 20, 2017Updated 8 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- ☆32Apr 21, 2019Updated 7 years ago
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆912Jul 29, 2024Updated last year
- Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. …☆15Jan 19, 2018Updated 8 years ago
- Welcome to the official repository of AC-LORA: (Almost) Training-Free Access Control-Aware Multi-Modal LLMs, a mechanism that provides tr…☆21Nov 14, 2025Updated 5 months ago
- A configuration controller solution allowing a Zynq device to configure downstream FPGAs☆14Oct 5, 2015Updated 10 years ago
- Vivado HLS study notes, courses, documents.☆12Dec 7, 2019Updated 6 years ago
- 多特征(色调+边缘+纹理)融合的目标跟踪☆10Apr 24, 2018Updated 8 years ago
- Updated Xilinx PYNQ for Zynq + ZynqMP python HW acceleration development☆12Mar 16, 2018Updated 8 years ago
- Mean-Shift (MS) Mean-Shift (MS) is widely known as one of the most basic yet powerful tracking algorithms. Mean- Shift considers feature …☆11Dec 21, 2017Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Free TPU OS running on the FPGA☆10May 6, 2023Updated 3 years ago
- Benchmarks for Yosys development☆24Feb 17, 2020Updated 6 years ago
- The community version of HLS_BLSTM (A BLSTM FPGA accelerator of an OCR appilcation, using CAPI/SNAP))☆11Sep 27, 2019Updated 6 years ago
- Motion detection in both software and in hardware-accelerated OpenCV☆15Dec 26, 2016Updated 9 years ago
- It is a GPIO interrupt example for xilinx ZYNQ FPGA.☆14Oct 7, 2014Updated 11 years ago
- Construct a regular expression engine used the algorithm in the Compilers(second edition)☆16Jul 21, 2013Updated 12 years ago
- influxdb-cluster是基于influxdb1.7.x版本以及分布式Raft协议开发的分布式时序数据库☆15Feb 8, 2020Updated 6 years ago