Alternatives and similar repositories for HiFlipVX

Users that are interested in HiFlipVX are comparing it to the libraries listed below

• KastnerRG / Spector-HLS
  Contains FPGA benchmarks for Vivado HLS and Catapult HLS
  ☆26Updated 5 years ago
• kiabuzz / CompressedLUT
  A tool to generate optimized hardware files for univariate functions.
  ☆29Updated last year
• hlslibs / ac_ml
  Algorithmic C Machine Learning Library
  ☆26Updated last week
• UCLA-VAST / FlexCNN
  ☆72Updated 2 years ago
• UCLA-VAST / AutoBridge
  [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.
  ☆127Updated 2 years ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated 2 years ago
• hlslibs / matchlib_connections
  Matchlib Connections Library - latency insensitive channels (from NVlabs/matchlib/connections)
  ☆43Updated last week
• Sibylau / HLS_designs
  Systolic array implementations for Cholesky, LU, and QR decomposition
  ☆46Updated last year
• UofT-HPRC / galapagos
  ☆15Updated 4 months ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆101Updated last year
• esl-epfl / OpenEdgeCGRA
  An Open-Hardware CGRA for accelerated computation on the edge.
  ☆38Updated 3 weeks ago
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆82Updated 6 years ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 4 years ago
• sfu-arch / SpGEMM
  ☆36Updated 4 years ago
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆49Updated 8 months ago
• hyoukjun / DesignCNNAccelerators
  Lab code for three-day lecture, "Designing CNN Accelerators using Bluespec System Verilog", given at SNU in December 2017
  ☆31Updated 7 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• hyoukjun / microswitch-noc
  ☆27Updated 6 years ago
• pku-liang / TensorLib
  A Spatial Accelerator Generation Framework for Tensor Algebra.
  ☆60Updated 3 years ago
• bsc-loca / sauria
  SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…
  ☆66Updated 2 weeks ago
• ic-lab-duth / NoCpad
  HLS for Networks-on-Chip
  ☆37Updated 4 years ago
• hlslibs / hls_tutorials
  Tutorials on HLS Design
  ☆52Updated 5 years ago
• sharc-lab / FPGA_ECE8893
  ☆38Updated 7 months ago
• kmanev / ZynqUSp-AXI-Speedtest
  ☆16Updated 5 years ago
• UCLA-VAST / AutoDSE
  ACM TODAES Best Paper Award, 2022
  ☆31Updated 2 years ago
• SFU-HiAccel / rodinia-hls
  FPGA version of Rodinia in HLS C/C++
  ☆40Updated 4 years ago
• UCLA-VAST / tapa
  TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.
  ☆175Updated 3 months ago
• DNN-Accelerators / Open-Source-IPs
  ☆35Updated 6 years ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)
  ☆168Updated 2 years ago
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆54Updated 8 years ago