adam-smnk / Open-CIM-CompilerLinks
☆32Updated 4 years ago
Alternatives and similar repositories for Open-CIM-Compiler
Users that are interested in Open-CIM-Compiler are comparing it to the libraries listed below
Sorting:
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆67Updated 2 years ago
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆47Updated last year
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆75Updated 6 months ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆83Updated 2 years ago
- ☆59Updated 6 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆93Updated 5 months ago
- MICRO22 artifact evaluation for Sparseloop☆44Updated 3 years ago
- PUMA Compiler☆29Updated 5 years ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆66Updated last week
- ☆48Updated 4 years ago
- ☆71Updated 7 months ago
- Release of stream-specialization software/hardware stack.☆121Updated 2 years ago
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆40Updated 2 years ago
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆59Updated 3 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆72Updated last year
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆64Updated 2 weeks ago
- ☆57Updated last year
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆42Updated last month
- An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…☆86Updated last year
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆84Updated last year
- Attentionlego☆12Updated last year
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆80Updated 3 years ago
- agile hardware-software co-design☆51Updated 3 years ago
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆59Updated 3 months ago
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆38Updated 2 months ago
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆65Updated 5 months ago
- RTL implementation of Flex-DPE.☆112Updated 5 years ago
- ☆40Updated last year
- STONNE: A Simulation Tool for Neural Networks Engines☆139Updated 3 months ago