adam-smnk / Open-CIM-Compiler
☆26Updated 3 years ago
Related projects ⓘ
Alternatives and complementary repositories for Open-CIM-Compiler
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆56Updated last year
- ☆37Updated 8 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆56Updated 2 months ago
- PUMA Compiler☆28Updated 4 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆65Updated 3 years ago
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆40Updated last week
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆22Updated 5 months ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆74Updated last year
- A reference implementation of the Mind Mappings Framework.☆28Updated 2 years ago
- MICRO22 artifact evaluation for Sparseloop☆39Updated 2 years ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆52Updated this week
- RTL implementation of Flex-DPE.☆91Updated 4 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆71Updated 3 months ago
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆32Updated last year
- An Open-Source Tool for CGRA Accelerators☆57Updated 3 months ago
- ☆34Updated 4 months ago
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆67Updated last week
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆52Updated 2 years ago
- An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…☆80Updated 6 months ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆64Updated 11 months ago
- Serpens is an HBM FPGA accelerator for SpMV☆16Updated 3 months ago
- agile hardware-software co-design☆46Updated 2 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆44Updated 2 years ago
- ☆24Updated 7 months ago
- ☆37Updated 4 months ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆53Updated last month
- ☆16Updated 2 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆63Updated 5 years ago
- ☆25Updated 3 years ago
- A co-design architecture on sparse attention☆44Updated 3 years ago