Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Lukas Cavigelli, Georg Rutishauser, Luca Benini.
☆18Oct 6, 2019Updated 6 years ago
Alternatives and similar repositories for ExtendedBitPlaneCompression
Users that are interested in ExtendedBitPlaneCompression are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆25Jul 14, 2020Updated 6 years ago
- hardware (ASIC) DEFLATE designed for low-latency page-granularity memory compression and implemented in Chisel☆16Nov 15, 2024Updated last year
- A implement of run-length encoding for Pytorch tensor using CUDA☆14Apr 7, 2021Updated 5 years ago
- Project where we conceptualized and designed a simple neural network accelerator, loosely based on the Eyeriss architecture, to accelerat…☆11Dec 13, 2019Updated 6 years ago
- Static Block Floating Point Quantization for CNN☆38Jun 9, 2021Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Official implementation for Wavelet Feature Maps Compression for Image-to-Image CNNs, NeurIPS 2022.☆37Oct 12, 2022Updated 3 years ago
- Source code for the Base-Delta-Immediate Compression Algorithm (described in the PACT 2012 paper by Pekhimenko et al. at http://users.ece…☆28Mar 1, 2015Updated 11 years ago
- RTL code for the DPU chip designed for irregular graphs☆14May 30, 2022Updated 4 years ago
- Code needed to reproduce results from my ICLR 2019 paper on fixed-point quantization of the backprop algorithm.☆10Jan 24, 2019Updated 7 years ago
- ☆14Oct 26, 2023Updated 2 years ago
- [ICLR 2022 Oral] F8Net: Fixed-Point 8-bit Only Multiplication for Network Quantization☆93May 5, 2022Updated 4 years ago
- ☆16Jan 20, 2021Updated 5 years ago
- BlockCIrculantRNN (LSTM and GRU) using TensorFlow☆14Oct 30, 2018Updated 7 years ago
- ☆20Mar 6, 2022Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆29Apr 15, 2025Updated last year
- A general framework for optimizing DNN dataflow on systolic array☆40Jan 2, 2021Updated 5 years ago
- A DAG processor and compiler for a tree-based spatial datapath.☆16Aug 24, 2022Updated 3 years ago
- ☆11Mar 14, 2022Updated 4 years ago
- Stencil with Optimized Dataflow Architecture☆12Feb 27, 2024Updated 2 years ago
- AGARNet☆15Feb 10, 2020Updated 6 years ago
- ☆19Aug 25, 2017Updated 8 years ago
- Neural Network Quantization With Fractional Bit-widths☆11Feb 19, 2021Updated 5 years ago
- PyTorch implementation of HashedNets☆38Apr 21, 2023Updated 3 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Mobilenet v1 (3,128,128, alpha=0.25) on STMH7 using STMCube AI☆10Oct 25, 2019Updated 6 years ago
- ☆32Apr 21, 2019Updated 7 years ago
- This project is a implementation in PyTorch for ZO-AdaMU optimization: Adapting Perturbation with the Momentum and Uncertainty in Zeroth-…☆15Dec 12, 2023Updated 2 years ago
- ☆10Nov 27, 2024Updated last year
- A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs, with error detection capabili…☆14Aug 28, 2025Updated 10 months ago
- [ICLR 2025] RaSA: Rank-Sharing Low-Rank Adaptation☆10May 19, 2025Updated last year
- A tool to generate optimized hardware files for univariate functions.☆30Apr 5, 2024Updated 2 years ago
- ☆30Feb 7, 2020Updated 6 years ago
- Tutorials on HLS Design☆51Jan 16, 2020Updated 6 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- LVGL DEMOS STM32☆10Nov 15, 2022Updated 3 years ago
- Low Precision Arithmetic Simulation in PyTorch☆289May 20, 2024Updated 2 years ago
- ☆17Jun 12, 2026Updated last month
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆299Oct 30, 2025Updated 8 months ago
- CPU implementation of the Image stitching using FAST. For FPGA implementation visit tharaka27-SocStitcher.☆12Jun 19, 2020Updated 6 years ago
- A simulator integrates ChampSim and Ramulator.☆23Updated this week
- Repository for compilation and cycle-accurate simulator for scale-out systolic arrays☆16Jan 4, 2023Updated 3 years ago