Simple sram controller in verilog.
☆36Jun 5, 2016Updated 10 years ago
Alternatives and similar repositories for sram
Users that are interested in sram are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Jan 6, 2023Updated 3 years ago
- Verilog Code for a JPEG Decoder☆34Mar 7, 2018Updated 8 years ago
- Discrete Cosine Transform (DCT) is one of the important image compression algorithms used in image processing applications. Several algor…☆26May 5, 2015Updated 11 years ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆11Jun 3, 2019Updated 7 years ago
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Apr 20, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Automatically exported from code.google.com/p/tpzsimul☆14Jul 7, 2015Updated 10 years ago
- MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award☆16Apr 12, 2024Updated 2 years ago
- A parser for PTX 6.5☆13Jun 19, 2023Updated 2 years ago
- ☆16May 1, 2024Updated 2 years ago
- JPEG Compression RTL implementation☆11Aug 19, 2017Updated 8 years ago
- Simple cache design implementation in verilog☆55Nov 20, 2023Updated 2 years ago
- ☆16Mar 21, 2016Updated 10 years ago
- mumax3 with sot(spin orbit torque)☆11Mar 3, 2023Updated 3 years ago
- MICRO 2023 Evaluation Artifact for TeAAL☆11Oct 26, 2023Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- DMA Hardware Description with Verilog☆20Dec 20, 2019Updated 6 years ago
- ☆20Aug 22, 2022Updated 3 years ago
- I2C communication for FTDI chips using free libftdi☆15Aug 2, 2016Updated 9 years ago
- codes of the paper Rate Gradient Approximation Attack Threats Deep Spiking Neural Networks (CVPR 2023)☆16Aug 19, 2024Updated last year
- A FIFO or Queue is an array of memory commonly used in hardware to transfer transfer data between two circuits with different clocks. The…☆16Nov 5, 2017Updated 8 years ago
- Video Effects on VGA☆15Jan 7, 2019Updated 7 years ago
- Network-on-Chip simulator (Booksim) with hooks for co-simulating RTL designs in Verilog.☆25Nov 2, 2015Updated 10 years ago
- Vivado project for Xilinx Artix FPGA, used in logic analyzer☆14Jul 16, 2021Updated 4 years ago
- ☆19Aug 11, 2022Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- KPU - the RISC based Open Source CPU☆17Nov 4, 2017Updated 8 years ago
- JPEG Compression using DCT (Discrete Cosine Transform) and DWT (Discrete Wavelet Transform) in Matlab.☆10Nov 26, 2019Updated 6 years ago
- SRAM macros created for the GF180MCU provided by GlobalFoundries.☆20Apr 10, 2023Updated 3 years ago
- Using verilog to implement MAC (Multiply Accumulate) . Verifying it by testbench .☆16Feb 17, 2019Updated 7 years ago
- Spin-maru: Round Touchpad, Endless Scroll.☆18Apr 28, 2025Updated last year
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆17Sep 9, 2023Updated 2 years ago
- this repository is a project about iic master, created by gyj in second half of 2017☆18Jun 30, 2018Updated 7 years ago
- Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.☆143May 14, 2021Updated 5 years ago
- ☆18May 17, 2018Updated 8 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- A python script to directly create g-codes.☆10Aug 20, 2025Updated 9 months ago
- MPLAB® PowerSmart™ SDK - Digital Control Library Designer Configuration Tool & Code Generator☆13Apr 12, 2021Updated 5 years ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆30Feb 6, 2023Updated 3 years ago
- Efficient 8 bit AVR-based DTMF Decoding☆12Jan 8, 2016Updated 10 years ago
- Kogge-Stone Adder in Verilog☆16Nov 19, 2021Updated 4 years ago
- ViMag - an OVF data visualizer☆12Jan 2, 2021Updated 5 years ago
- [ACL 2026 🔥] CASS: Nvidia to AMD Transpilation with Data, Models, and Benchmark☆34Apr 20, 2026Updated last month