lawrie / tiny_ram_soc
Picorv32 SoC that uses only BRAM, not flash memory
☆12Updated 6 years ago
Alternatives and similar repositories for tiny_ram_soc:
Users that are interested in tiny_ram_soc are comparing it to the libraries listed below
- Mini CPU design with JTAG UART support☆19Updated 3 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆26Updated 4 years ago
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Updated 5 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆20Updated last year
- Simplified environment for litex☆14Updated 4 years ago
- Quickly update a bitstream with new RAM contents☆15Updated 3 years ago
- This repository contains a makefile to easily install Symbiflow for the Xilinx 7 Series boards.☆10Updated 3 years ago
- Using VexRiscv without installing Scala☆37Updated 3 years ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- PLEASE MOVE TO PAWSv2☆17Updated 3 years ago
- crap-o-scope scope implementation for icestick☆20Updated 6 years ago
- Small footprint and configurable Inter-Chip communication cores☆55Updated last month
- Utilities for the ECP5 FPGA☆18Updated 3 years ago
- HDMI Expansion Modules compatible with the Pmod standard☆11Updated 6 years ago
- A configurable USB 2.0 device core☆30Updated 4 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆26Updated 5 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆40Updated 4 years ago
- A reconfigurable logic circuit made of identical rotatable tiles.☆21Updated 3 years ago
- Wishbone interconnect utilities☆38Updated last week
- CologneChip GateMate FPGA Module: GMM-7550☆21Updated last year
- Reusable Verilog 2005 components for FPGA designs☆40Updated last year
- There are many RISC V projects on iCE40. This one is mine.☆14Updated 4 years ago
- My pergola FPGA projects☆30Updated 3 years ago
- A padring generator for ASICs☆25Updated last year
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆35Updated last year
- Experiments with Cologne Chip's GateMate FPGA architecture☆15Updated last year
- PCB combining Raspberry Pi Pico and iCE40 FPGA☆32Updated 9 months ago
- CRUVI Standard Specifications☆17Updated 9 months ago
- ☆10Updated 6 years ago
- Cross compile FPGA tools☆22Updated 4 years ago