ECE 5745 Tutorial 8: SRAM Generators
☆19Mar 5, 2022Updated 4 years ago
Alternatives and similar repositories for ece5745-tut8-sram
Users that are interested in ece5745-tut8-sram are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SRAM☆24Sep 6, 2020Updated 6 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆91May 2, 2021Updated 5 years ago
- SRAM Design using OpenSource Applications☆26Jul 16, 2021Updated 5 years ago
- ☆10Jun 28, 2019Updated 7 years ago
- 3.3V SRAM macros for GF180MCU, based on the original 5V SRAM macros.☆24Oct 30, 2026Updated last week
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA☆23Sep 2, 2023Updated 3 years ago
- Adaptive floating-point based numerical format for resilient deep learning☆14Apr 11, 2022Updated 4 years ago
- This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Proce…☆34Jul 25, 2023Updated 3 years ago
- Projects published on controlpaths.com and hackster.io☆42Jul 18, 2022Updated 4 years ago
- Xilinx Virtual Cable server for FT2232H (targeted for ARM SBCs)☆21Mar 7, 2022Updated 4 years ago
- My personal collection of HSPICE simulations.☆11Jun 18, 2012Updated 14 years ago
- An open-source static random access memory (SRAM) compiler.☆1,177Oct 29, 2026Updated last week
- A Verilog implementation of Multi-bit-throughput LFSR with an detailed document about LFSRs for HW design engineers☆10Jan 2, 2026Updated 10 months ago
- mumax3 with sot(spin orbit torque)☆11Mar 3, 2023Updated 3 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Native debugging for VSCode for Xilinx's XSDB☆11Aug 21, 2026Updated 2 months ago
- This repo is for synopsys icc2 flow for skywater 130nm PDK☆15Feb 7, 2023Updated 3 years ago
- Advanced encryption standard (AES) algorithm has been widely deployed in cryptographic applications. This work proposes a low power and h…☆24Apr 15, 2021Updated 5 years ago
- AES implementations in chisel, PyRTL, VivadoHLS, C++ and Python☆11Apr 18, 2022Updated 4 years ago
- An open source PDK using TIGFET 10nm devices.☆61Dec 19, 2022Updated 3 years ago
- BVtk: scientific visualization inside Blender☆10Dec 2, 2019Updated 6 years ago
- Multichannel RF Reference Architecture (MRFRA) code, utilities, and documentation using USRP SDR☆14Aug 15, 2022Updated 4 years ago
- Advent of Code puzzles, solved in Hardware☆25Jan 13, 2026Updated 9 months ago
- ECE 5745 Tutorial 6: Automated ASIC Flow☆10Feb 4, 2022Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Synthesis using Synopsys DC and Physical Design flow using Synopsys ICC II, of my RISC-V 5 stage pipelined using 32 nm tech repo☆16Jul 31, 2024Updated 2 years ago
- ☆16Dec 7, 2023Updated 2 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆33Aug 20, 2022Updated 4 years ago
- AXI4 to SRAM Interface☆13May 2, 2022Updated 4 years ago
- Awesome Quantization Paper lists with Codes☆10Feb 24, 2021Updated 5 years ago
- ☆10May 15, 2018Updated 8 years ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC☆44Jun 13, 2023Updated 3 years ago
- e300 and u500 devkits☆10Nov 15, 2020Updated 5 years ago
- 4096bit Iterative digit-digit Montgomery Multiplication in Verilog☆20Apr 18, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- The PE for the second generation CGRA (garnet).☆18Oct 27, 2026Updated last week
- SRAM macros created for the GF180MCU provided by GlobalFoundries.☆20Apr 10, 2023Updated 3 years ago
- Metasys is the first open-source FPGA-based infrastructure with a prototype in a RISC-V core, to enable the rapid implementation and eval…☆16Jan 20, 2023Updated 3 years ago
- VLSI Design of an 8 x 2 SRAM Array | Cadence Virtuoso☆12Feb 10, 2020Updated 6 years ago
- Deep Variational Information Bottleneck (DVIB) in PyTorch.☆10Apr 25, 2020Updated 6 years ago
- A catalog of my old-school GFX effects☆44Jan 30, 2024Updated 2 years ago
- MIDAS Public Release☆11Nov 27, 2018Updated 7 years ago