RC4ML / FpgaNICLinks
FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]
☆136Updated 2 years ago
Alternatives and similar repositories for FpgaNIC
Users that are interested in FpgaNIC are comparing it to the libraries listed below
Sorting:
- RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.☆152Updated 8 months ago
- PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing☆104Updated 2 years ago
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆59Updated last year
- Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…☆117Updated 5 months ago
- A Programmable Hardware Architecture for Network Transport Logic☆35Updated 4 years ago
- ☆78Updated 3 months ago
- ☆53Updated last year
- Clio, ASPLOS'22.☆78Updated 3 years ago
- Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators☆97Updated 5 months ago
- ☆71Updated 9 months ago
- HW/SW co-designed end-host RPC stack☆20Updated 4 years ago
- ☆68Updated 4 years ago
- AMD OpenNIC driver includes the Linux kernel driver☆69Updated 11 months ago
- A Cycle-level simulator for M2NDP☆32Updated 3 months ago
- RPCNIC: A High-Performance and Reconfigurable PCIe-attached RPC Accelerator [HPCA2025]☆13Updated 11 months ago
- ☆80Updated 5 years ago
- VNx: Vitis Network Examples☆155Updated 3 months ago
- An Agile Chisel-Based SoC Design Framework☆26Updated 3 years ago
- Pin based tool for simulation of rack-scale disaggregated memory systems☆30Updated 9 months ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous pl…☆314Updated 2 weeks ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆178Updated 3 years ago
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆58Updated 6 years ago
- ☆53Updated 3 years ago
- Examples of DPU programs using the UPMEM DPU SDK☆45Updated 10 months ago
- ☆49Updated 6 months ago
- For publishing the source for UG1352 "Get Moving with Alveo"☆49Updated 5 years ago
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆111Updated 7 months ago
- AMD OpenNIC Shell includes the HDL source files☆134Updated 11 months ago
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆45Updated 8 years ago