Lower chisel memories to SRAM macros
☆13Mar 25, 2024Updated last year
Alternatives and similar repositories for chisel-memory-lower
Users that are interested in chisel-memory-lower are comparing it to the libraries listed below
Sorting:
- A router IP written in Verilog.☆12Dec 20, 2019Updated 6 years ago
- A naive verilog/systemverilog formatter☆21Mar 22, 2025Updated 11 months ago
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆45Jul 25, 2024Updated last year
- Implements kernels with RISC-V Vector☆22Mar 24, 2023Updated 2 years ago
- A simple MIPS CPU for BUAA CO course (and now NSCSCC).☆10May 15, 2021Updated 4 years ago
- A hand-written recursive decent Verilog parser.☆10Jan 30, 2026Updated last month
- 开源软件供应链点亮计划 - 暑期2020的主页代码。This repository is the homepage for Open Source Promotion Plan - Summer 2020 built with create-react-app.☆10Aug 28, 2024Updated last year
- Verilog code of Loongson's GS132 core☆12Dec 19, 2019Updated 6 years ago
- An SoC with multiple RISC-V IMA processors.☆19Aug 1, 2018Updated 7 years ago
- Vivado in GitLab-Runner for GitLab CI/CD☆10Oct 27, 2022Updated 3 years ago
- ☆15Feb 5, 2026Updated 3 weeks ago
- Compiling finite generators to digital logic. WIP☆13Aug 24, 2020Updated 5 years ago
- Open-source non-blocking L2 cache☆54Feb 12, 2026Updated 2 weeks ago
- Run Rocket Chip on VCU128☆30Oct 21, 2025Updated 4 months ago
- PKU CompNet'19 Lab 2 - Homebrew TCP☆12Nov 29, 2019Updated 6 years ago
- Generate graphviz dot files from InfiniBand topology dumps.☆16Feb 11, 2024Updated 2 years ago
- Wrappers for open source FPU hardware implementations.☆37Nov 27, 2025Updated 3 months ago
- ☆15Dec 15, 2022Updated 3 years ago
- Relaxed Rust (for cats)☆14Nov 20, 2019Updated 6 years ago
- Run SPEC CPU 2017 benchmark on OpenHarmony/HarmonyOS NEXT☆35Jun 18, 2025Updated 8 months ago
- Serverless browser offloading with Faasm and WebAssembly☆15Feb 14, 2022Updated 4 years ago
- NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.☆13Mar 29, 2025Updated 11 months ago
- 方便扩展的Cuda算子理解和优化框架,仅用在学习使用☆18Jun 13, 2024Updated last year
- Compile Time RapidJSON: A compile time C++ header only JSON library without bloating yet another hand-crafted JSON parser based on RapidJ…☆14Jun 29, 2020Updated 5 years ago
- A small RISC-V kernel coding by C, tested on sifive unmatched board.☆16Aug 20, 2022Updated 3 years ago
- 第六届龙芯杯混元形意太极门战队作品☆18May 15, 2022Updated 3 years ago
- Warning: 🕳 ahead!☆16Jan 8, 2020Updated 6 years ago
- Yet Another AsYnc runtime for RuSt.☆33Feb 1, 2020Updated 6 years ago
- RV32I by cats☆15Sep 4, 2023Updated 2 years ago
- Convert regex(es) to dfa.☆14Apr 30, 2021Updated 4 years ago
- ☆17Mar 17, 2022Updated 3 years ago
- Documentation for Router Lab☆70Nov 19, 2025Updated 3 months ago
- Rcore Virtual Machine☆115Mar 6, 2024Updated last year
- Linux source code for ISCA 2020 paper "Enhancing and Exploiting Contiguity for Fast Memory Virtualization"☆20Oct 31, 2020Updated 5 years ago
- Sampled simulation of multi-threaded applications using LoopPoint methodology☆24Feb 21, 2026Updated last week
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆37Jan 26, 2022Updated 4 years ago
- HERMES: sHallow dirEctory stRucture Many-filE fileSystem☆20Jun 9, 2019Updated 6 years ago
- A Rust style C++ library.☆19Sep 3, 2022Updated 3 years ago
- Zero-Config Single-Node Workload Manager☆17Jan 5, 2021Updated 5 years ago