☆22Nov 25, 2023Updated 2 years ago
Alternatives and similar repositories for ysyx-exam
Users that are interested in ysyx-exam are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆95Apr 14, 2026Updated 2 months ago
- A docker image for One Student One Chip's debug exam☆10Sep 22, 2023Updated 2 years ago
- 我的一生一芯项目☆16Dec 14, 2021Updated 4 years ago
- ☆16Jul 23, 2025Updated 11 months ago
- Undergraduate Course Materials in UCAS, from 2017 to 2021☆20Oct 12, 2020Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Nix template for the chisel-based industrial designing flows.☆58Apr 23, 2025Updated last year
- Real Time GPA Calculator for Undergraduate Students in UCAS☆16Feb 22, 2024Updated 2 years ago
- RISC-V Open Source Supervisor Binary Interface☆10Jan 28, 2022Updated 4 years ago
- Hardware design with Chisel☆36Feb 9, 2023Updated 3 years ago
- ☆75Jun 13, 2026Updated 3 weeks ago
- A RISC-V RV32I ISA Single Cycle CPU☆26May 22, 2025Updated last year
- 5-stage RISC-V core (RV32IM) with pipelining designed for educational purposes by RPTU Kaiserslautern, Germany☆14Dec 4, 2025Updated 7 months ago
- Team <skyb> solution for the AIM2020 mobile image signal processing challenge☆17Mar 15, 2021Updated 5 years ago
- ☆27Oct 25, 2021Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- HW-SW Co-Simulation Library for AMBA AXI BFM using DPI/VPI☆37Dec 24, 2024Updated last year
- Open Image Signal Processor☆18Aug 20, 2023Updated 2 years ago
- 一份面向UCAS本科计算机科学与技术专业同学的基础指南☆35Feb 1, 2023Updated 3 years ago
- ☆128Jul 2, 2022Updated 4 years ago
- Generating RGB photos from RAW image files with PyNET-v2 Mobile☆27Jun 16, 2022Updated 4 years ago
- Automated Repair of Verilog Hardware Descriptions☆39Jan 16, 2025Updated last year
- A Verilator based SoC simulator that allows you to define AXI Slave interface in software.☆53Mar 31, 2026Updated 3 months ago
- Super fast RISC-V ISA emulator for XiangShan processor☆334Updated this week
- A framework for ysyx flow☆14Oct 31, 2024Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- RISC-V SoC designed by students in UCAS☆1,534Jun 5, 2026Updated 3 weeks ago
- Knowledge Graph of FPGA☆14Aug 21, 2021Updated 4 years ago
- A 32 point radix-2 FFT module written in Verilog☆25Jun 28, 2020Updated 6 years ago
- Synthesiser for Asynchronous Verilog Language☆20Oct 29, 2014Updated 11 years ago
- a riscv32 rv32imc emulator written in c.☆33May 7, 2026Updated last month
- XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA☆22Mar 7, 2024Updated 2 years ago
- EDA toolchain for processing-in-memory architectures, including an architecture synthesizer, a compiler, and a simulator☆22Jun 12, 2025Updated last year
- Scripts to automate building linux images for my emulator riscv_em☆16Oct 24, 2023Updated 2 years ago
- 基于小脚丫FPGA的电子琴,模拟钢琴音色,支持127个音符演奏,可通过转化MIDI文件实现自动播放☆16Aug 22, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- The decoder library for jemu execution and web documentation☆54Oct 6, 2023Updated 2 years ago
- SPIR-V fragment shader GPU core based on RISC-V☆44May 26, 2021Updated 5 years ago
- RV64emu is a riscv64 emulator written in rust,can run linux !☆23Oct 5, 2024Updated last year
- A Zero Cost Abstruction of FSM(Finite State Machine) circuits based on chisel3.☆13Oct 8, 2021Updated 4 years ago
- DDR2 memory controller written in Verilog☆83Feb 28, 2012Updated 14 years ago
- This is a project created and completed by team BOOM(Beihang OO masters).This is a superscalar processor with a 13-stage out-of-order dua…☆18Sep 29, 2024Updated last year
- A distributed stream querying engine that provides sub-millisecond stateful query at millions of queries per-second over fast-evolving li…☆10Jul 18, 2018Updated 7 years ago