A generic test bench written in Bluespec
☆57Aug 26, 2026Updated last week
Alternatives and similar repositories for bluecheck
Users that are interested in bluecheck are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Formal semantics of BSV (Bluespec SystemVerilog), given as a Haskell Program and accompanying document☆17Jul 17, 2016Updated 10 years ago
- RISC-V BSV Specification☆24Apr 28, 2026Updated 4 months ago
- Testing processors with Random Instruction Generation☆62Aug 21, 2026Updated 2 weeks ago
- A tool to run litmus tests on bare-metal hardware☆13Mar 13, 2017Updated 9 years ago
- A place to share libraries and utilities that don't belong in the core bsc repo☆41May 1, 2026Updated 4 months ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Textbook and full source codes to learn basics of RISC-V pipelined CPU design using the Bluespec Hardware Design Language(s)☆107Jul 3, 2026Updated 2 months ago
- Bluespec Compiler (BSC)☆1,143Updated this week
- Bluespec SystemVerilog library for use of the IBM Coherent Accelerator-Processor Interface (CAPI)☆11May 25, 2016Updated 10 years ago
- A core language for rule-based hardware design 🦑☆184Dec 10, 2025Updated 8 months ago
- Consistency checker for memory subsystem traces☆23Oct 10, 2016Updated 9 years ago
- A Bluespec SystemVerilog library of miscellaneous components☆18Jul 10, 2026Updated last month
- A formal spec of the RISC-V Instruction Set Architecture, written in Bluespec BSV (executable, synthesizable)☆20Sep 15, 2017Updated 8 years ago
- Main page☆132Jul 13, 2026Updated last month
- Main page☆35Feb 12, 2020Updated 6 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- A Platform for High-Level Parametric Hardware Specification and its Modular Verification☆169May 26, 2026Updated 3 months ago
- ☆21Aug 1, 2015Updated 11 years ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- Learn the Design of a 6-stage pipelined RISC-V CPU☆16Oct 22, 2025Updated 10 months ago
- ☆18Jul 12, 2024Updated 2 years ago
- Connectal is a framework for software-driven hardware development.☆180Oct 16, 2023Updated 2 years ago
- RTLCheck☆26Oct 9, 2018Updated 7 years ago
- A Coq framework to support structural design and proof of hardware cache-coherence protocols☆15May 7, 2022Updated 4 years ago
- The hardware implementation of UDP in Bluespec SystemVerilog☆14Jun 3, 2024Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- BSC Development Workstation (BDW)☆34May 1, 2026Updated 4 months ago
- ☆11Jan 2, 2026Updated 8 months ago
- Yosys plugin for synthesis of Bluespec code☆17Sep 8, 2021Updated 4 years ago
- The BERI and CHERI processor and hardware platform☆51Mar 27, 2017Updated 9 years ago
- Riscy Processors - Open-Sourced RISC-V Processors☆74Apr 4, 2019Updated 7 years ago
- The RISC-V Application Profiler is a Python-based tool designed to help software developers optimize the performance of their application…☆31Apr 23, 2025Updated last year
- ☆15Feb 6, 2021Updated 5 years ago
- The Task Parallel System Composer (TaPaSCo)☆127Jun 23, 2026Updated 2 months ago
- Bluespec BSV HLHDL tutorial☆116Mar 29, 2016Updated 10 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Amazon F1-inspired Xilinx VCU118 hardware design framework☆14Jan 4, 2021Updated 5 years ago
- A formal semantics of the RISC-V ISA in Haskell☆177Aug 13, 2023Updated 3 years ago
- Manythread RISC-V overlay for FPGA clusters☆39Sep 16, 2025Updated 11 months ago
- RiscyOO: RISC-V Out-of-Order Processor☆170Jul 3, 2020Updated 6 years ago
- Equivalence checking with Yosys☆62Updated this week
- ☆10Oct 15, 2021Updated 4 years ago
- Bluespec environment for working with the ulx3s board and its lattice ecp5 fpga☆15Mar 9, 2025Updated last year