USB capture IP
☆25Jun 6, 2020Updated 5 years ago
Alternatives and similar repositories for core_usb_sniffer
Users that are interested in core_usb_sniffer are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Xilinx IP repository☆13May 5, 2018Updated 7 years ago
- A simple implementation of the Karatsuba multiplication algorithm☆12Apr 2, 2025Updated 11 months ago
- USB2Sniffer: High Speed USB 2.0 capture (for LambdaConcept USB2Sniffer hardware)☆59Jun 6, 2020Updated 5 years ago
- Verilog FPGA code : including experimental DSP audio processor☆13Dec 1, 2020Updated 5 years ago
- MMC (and derivative standards) host controller☆25Sep 14, 2020Updated 5 years ago
- USB2.0 Device Controller IP Core☆15Aug 18, 2023Updated 2 years ago
- USB serial device (CDC-ACM)☆45Jun 28, 2020Updated 5 years ago
- Digital audio equalizer created written in Verilog for Altera DE1 SoC FPGA board.☆12Aug 9, 2019Updated 6 years ago
- a multiplier÷r verilog RTL file for RV32M instructions☆14Mar 17, 2020Updated 6 years ago
- SpinalHDL USB system for the ULPI based Arrow DECA board☆20Jan 9, 2022Updated 4 years ago
- fork from https://gitee.com/crouchggj/STM32F4_USB_SoundCard☆16Aug 3, 2019Updated 6 years ago
- Xilinx Bitstream Format Library. Easily read .bit files from C programs.☆14Nov 16, 2015Updated 10 years ago
- Cheapest UAC2 using STM32F407+USB3300☆21Feb 26, 2025Updated last year
- USB -> AXI Debug Bridge☆43Jun 5, 2021Updated 4 years ago
- Hamming ECC Encoder and Decoder to protect memories☆35Jan 28, 2025Updated last year
- High Speed USB 2.0 capture device based on miniSpartan6+☆60May 26, 2020Updated 5 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆68May 8, 2020Updated 5 years ago
- Huffman encoder☆10Sep 8, 2013Updated 12 years ago
- ULPI Link Wrapper (USB Phy Interface)☆37May 3, 2020Updated 5 years ago
- 128KB AXI cache (32-bit in, 256-bit out)☆55May 10, 2021Updated 4 years ago
- A command line programmer interfacing for Winner Marco 800 series chips.☆10May 6, 2024Updated last year
- Open Source Windows UAC2 driver☆20Feb 24, 2013Updated 13 years ago
- Custom 64-bit pipelined RISC processor☆18Dec 8, 2025Updated 3 months ago
- Open Source SSD Controller. NVMe and Lightstor variants☆17May 21, 2014Updated 11 years ago
- Simple and effective parallel CRC calculator written in synthesizable SystemVerilog☆15Apr 11, 2019Updated 6 years ago
- Qt-based software for USB2Sniffer☆35Oct 1, 2025Updated 5 months ago
- HARV - HArdened Risc-V☆16Mar 10, 2022Updated 4 years ago
- ☆17Jun 5, 2024Updated last year
- A collection of demonstration digital filters☆167Jan 18, 2024Updated 2 years ago
- Delta-Sigma modulator (DSM) for fractional phase locked loop.☆34May 28, 2021Updated 4 years ago
- ☆13Updated this week
- Basic USB-CDC device core (Verilog)☆88May 15, 2021Updated 4 years ago
- a fast multiplier implement using verilog☆13Dec 23, 2014Updated 11 years ago
- 异步FIFO的内部实现☆25Aug 26, 2018Updated 7 years ago
- Groundhog - Serial ATA Host Bus Adapter☆23Jun 10, 2018Updated 7 years ago
- A compact, configurable RISC-V core☆13Jul 31, 2025Updated 7 months ago
- A collection of SPI related cores☆21Nov 12, 2024Updated last year
- Super Audio CD ISO-Image decoder addon☆16Feb 27, 2026Updated 3 weeks ago
- RTL Verilog library for various DSP modules