DawnCarol/OpenC910_Modified external links

---

GitHub - View repository

GitHub.dev - Open in online code editor

Star history - Growth chart over time

deps.dev - Dependencies and security vulnerabilities

Gitingest - Export source code for LLM usage

Repomix - Export source code for LLM usage

uithub - Export source code for LLM usage

Close

DawnCarol/OpenC910_Modified

Readme badge preview -

If you own this repo, copy the snippet below and add it to your README.md

---

Copy

[![RelatedRepos](https://img.shields.io/badge/related-repos-yellow)](https://relatedrepos.com/gh/DawnCarol/OpenC910_Modified)

Close

DawnCarol / OpenC910_ModifiedView on GitHubMore

• External links
• Readme badge

commit rtl and build cosim env

☆16Feb 15, 2024Updated 2 years ago

Alternatives and similar repositories for OpenC910_Modified

Users that are interested in OpenC910_Modified are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.

• Advanced-Microelectronics-Group / OpenC910_Modified

  View on GitHub
  commit rtl and build cosim env
  ☆36Mar 29, 2024Updated 2 years ago
• KutuSystems / XilinxIP

  View on GitHub
  Xilinx IP repository
  ☆13May 5, 2018Updated 8 years ago
• IAMAl / Readings-in-Computer-Architectures

  View on GitHub
  Readings in Computer Architectures
  ☆17Apr 27, 2026Updated 4 months ago
• PacoReinaCampo / SoC-DV

  View on GitHub
  System on Chip verified with UVM/OSVVM/FV
  ☆36Aug 7, 2026Updated 3 weeks ago
• alientek-fpga / fpga_cyclone4

  View on GitHub
  正点原子开拓者&新起点FPGA开发板例程
  ☆16Nov 29, 2019Updated 6 years ago
• AI Agents on DigitalOcean Gradient AI Platform • Ad
  Build production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
• mgtm98 / pcie5_phy

  View on GitHub
  PCIE 5.0 Graduation project (Verification Team)
  ☆107Jan 27, 2024Updated 2 years ago
• michidk / myo-dataset

  View on GitHub
  This repository contains sEMG Data of 13 subjects recorded with the Myo Armband.
  ☆14Jan 8, 2022Updated 4 years ago
• LvNA-system / EasyDiff-noop

  View on GitHub
  ☆10Nov 12, 2019Updated 6 years ago
• Verdvana / Async_FIFO

  View on GitHub
  位宽和深度可定制的异步FIFO
  ☆14May 29, 2024Updated 2 years ago
• ultraembedded / core_usb_sniffer

  View on GitHub
  USB capture IP
  ☆27Jun 6, 2020Updated 6 years ago
• yayouz / CNN-accelerator

  View on GitHub
  DMA controller for CNN accelerator
  ☆15May 22, 2017Updated 9 years ago
• aliyun / alibabacloud-fpga

  View on GitHub
  ☆20Nov 7, 2019Updated 6 years ago
• steve30572 / Self-attention-based-GNN-for-sEMG

  View on GitHub
  ☆10Oct 30, 2024Updated last year
• D0ot / glec2

  View on GitHub
  A classic 5-stage rv32i(incomplete) toy implementation based on powerful SpinalHDL
  ☆10Jul 5, 2021Updated 5 years ago
• GPUs on demand by Runpod - Special Offer Available • Ad
  Run AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
• CospanDesign / verilog_ppfifo_demo

  View on GitHub
  Simple demo showing how to use the ping pong FIFO
  ☆17May 2, 2016Updated 10 years ago
• sorre97 / STM32-EMGsensor

  View on GitHub
  EMG sensor signal sampling and DSP filtering on an embedded STM32 board with he use of miosix RTOS
  ☆10Mar 13, 2021Updated 5 years ago
• xliu0709 / DACSDC2021

  View on GitHub
  ☆11Apr 15, 2024Updated 2 years ago
• shifengzhicheng / Fudan_Digital_EDA

  View on GitHub
  复旦数字集成电路设计自动化项目文档
  ☆11Apr 12, 2025Updated last year
• AsFigo / ivl_uvm

  View on GitHub
  Adding UVM support to Icarus Verilog (and Verilator in near future) by taking a step-by-step, bottom-up approach.
  ☆24Dec 27, 2022Updated 3 years ago
• zhangkunming0216 / FIFO_-asynchronous

  View on GitHub
  异步FIFO的内部实现
  ☆25Aug 26, 2018Updated 8 years ago
• pulp-platform / axi_llc

  View on GitHub
  ☆36Updated this week
• sunyata000 / AMY_MCU

  View on GitHub
  A MCU implementation based PODES-M0O
  ☆19Jan 31, 2020Updated 6 years ago
• balanx / SpinalHDLDemo

  View on GitHub
  Demo Sources for Learning Spinal HDL
  ☆16Dec 5, 2022Updated 3 years ago
• 1-Click AI Models by DigitalOcean Gradient • Ad
  Deploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
• uwemeyerbaese / DSP_with_FPGAs_ed3

  View on GitHub
  DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8
  ☆16Nov 8, 2025Updated 9 months ago
• sunyata000 / PODES-M0O

  View on GitHub
  A VerilogHDL MCU Core based ARMv6 Cortex-M0
  ☆23Jan 31, 2020Updated 6 years ago
• CospanDesign / vivado-ip-cores

  View on GitHub
  IP Cores that can be used within Vivado
  ☆27May 18, 2021Updated 5 years ago
• govindjeevan / Weighted-Round-Robin-Arbiter

  View on GitHub
  Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components
  ☆20Mar 10, 2018Updated 8 years ago
• xbwpc / EDA_FeatureColle

  View on GitHub
  A collection of license features from a varity of EDA vendors
  ☆93Aug 8, 2026Updated 3 weeks ago
• hellovimo / uvm_testbench_gen

  View on GitHub
  Novel GUI Based UVM Testbench Template Builder
  ☆156Apr 14, 2021Updated 5 years ago
• braejan / haskell-openai

  View on GitHub
  Just a Haskell wrapper for OpenAI API calls
  ☆11Mar 2, 2023Updated 3 years ago
• gilani / fpfma

  View on GitHub
  Binary Single Precision Floating-point Fused Multiply-Add Unit Design (Verilog HDL)
  ☆22Jul 8, 2013Updated 13 years ago
• Wang-Ji20 / milewski-ctfp-pdf-zh-cn-translation

  View on GitHub
  Chinese Translation for Bartosz Milewski's 'Category Theory for Programmers'. 《写给程序员的范畴论》中文翻译 欢迎 PR
  ☆13Oct 4, 2024Updated last year
• Deploy on Railway without the complexity - Free Credits Offer • Ad
  Connect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
• Netech-DevNote / dpdk_engineer_manual

  View on GitHub
  【冲破内核瓶颈，让I/O性能飙升】DPDK工程师手册，官方文档，最新视频，开源项目，实战案例，论文，大厂内部ppt，知名工程师一览表
  ☆19Mar 30, 2023Updated 3 years ago
• JulianKemmerer / Drexel-ECEC575

  View on GitHub
  ☆24Jun 17, 2014Updated 12 years ago
• merlinepedra25 / Xilinx-Unprotect

  View on GitHub
  ☆60Jul 22, 2022Updated 4 years ago
• rustsbi / prototyper

  View on GitHub
  [Archived - See https://github.com/rustsbi/rustsbi/] RustSBI prototyper
  ☆12Feb 16, 2025Updated last year
• sonarsys / BadgerTrap

  View on GitHub
  BadgerTrap is a tool to instrument x86-64 TLB misses.
  ☆13Nov 13, 2016Updated 9 years ago
• freecores / ethernet_tri_mode

  View on GitHub
  10_100_1000 Mbps tri-mode ethernet MAC
  ☆11Jul 17, 2014Updated 12 years ago
• SanjayRai / PCIE_AXI_BRIDGE

  View on GitHub
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆32Apr 25, 2016Updated 10 years ago