Verilog modules for software-defined radio.
☆20Dec 31, 2012Updated 13 years ago
Alternatives and similar repositories for fpga-sdrlib
Users that are interested in fpga-sdrlib are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A library for generating Software Defined Radio-intended DSP code for FPGAs that makes use of the MyHDL (www.myhdl.org) Python library. T…☆25Aug 29, 2012Updated 14 years ago
- MyBlaze is a synthesizable clone of the MicroBlaze Soft Processor written in MyHDL (http://www.myhdl.org). It started as a translation of…☆17May 30, 2013Updated 13 years ago
- Compare HDLs☆12Feb 9, 2015Updated 11 years ago
- A new CASPER toolflow based on an HDL primitives library☆17Apr 11, 2012Updated 14 years ago
- A FPGA layer 2 network switch with the unique ability of having virtual ports that can transmit and receive UDP data.☆13Jul 24, 2026Updated 3 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Repository containing the DSP gateware cores☆14Mar 9, 2026Updated 7 months ago
- A tool for merging the MyHDL workflow with Vivado☆20May 13, 2020Updated 6 years ago
- GNU Radio applications☆13Sep 28, 2019Updated 7 years ago
- Keeping this repo, for now, for archeaological purposes.☆19Apr 3, 2013Updated 13 years ago
- FPGA Development toolset☆20Jun 15, 2017Updated 9 years ago
- Digital FM Radio Receiver for FPGA☆67Dec 26, 2015Updated 10 years ago
- Initial 0.0.1 push☆13Jun 10, 2016Updated 10 years ago
- An attempt to synthesize GPS signals in FPGA logic.☆20Oct 21, 2026Updated last week
- gnuradio☆26Nov 29, 2019Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Utilities for MyHDL☆19Dec 15, 2023Updated 2 years ago
- Python tools for Vivado Projects☆72Apr 3, 2019Updated 7 years ago
- A VCD parser object☆41Jul 17, 2013Updated 13 years ago
- LMAC Core1 - Ethernet 1G/100M/10M☆19Apr 3, 2023Updated 3 years ago
- ☆20Jun 18, 2022Updated 4 years ago
- A Preprocessor for Verilog HDL written in C++☆11May 26, 2012Updated 14 years ago
- Simple parser for extracting VHDL documentation☆75Jul 12, 2024Updated 2 years ago
- ChipTools is a utility to automate FPGA build and verification☆27Oct 22, 2021Updated 5 years ago
- RIFFA (Reusable Integration Framework for FPGA Accelerators) is a framework developed in University of California, San Diego. This projec…☆14Jul 16, 2015Updated 11 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Open PicoBlaze Assembler☆65Oct 29, 2023Updated 3 years ago
- VHDL package to provide C-like string formatting☆15May 6, 2022Updated 4 years ago
- Exploration of alternative hardware description languages☆28Mar 9, 2018Updated 8 years ago
- hardware library for hwt (= ipcore repo)☆45Oct 17, 2026Updated 2 weeks ago
- Open-source software defined radar based on the USRP 1 hardware.☆39Sep 30, 2018Updated 8 years ago
- A simple low-resource usage Kalman Filter using shared resources - in MyHDL☆10Oct 7, 2024Updated 2 years ago
- C# projects that use ANTLR4 library to analyse VHDL and Verilog code☆11Feb 28, 2015Updated 11 years ago
- Using Software Designed Radio to transmit & receive FM signal☆49Apr 2, 2018Updated 8 years ago
- IP-XACT XML binding library☆17Jun 23, 2016Updated 10 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation☆15Oct 21, 2026Updated 2 weeks ago
- ☆33Jul 15, 2026Updated 3 months ago
- This is a TCL script that will take in Verilog and VHDL files and generate an instantiation template appropriately for the user to use in…☆10Dec 19, 2012Updated 13 years ago
- GNU Radio☆10Jan 23, 2019Updated 7 years ago
- TCL framework to package Vivado IP-Cores☆13May 18, 2022Updated 4 years ago
- ☆12Oct 3, 2024Updated 2 years ago
- Gnu Radio working stereo FM transmitter and receiver example (GNU Radio Companion flow graph)☆14Jun 14, 2011Updated 15 years ago