Verilog modules for software-defined radio.
☆20Dec 31, 2012Updated 13 years ago
Alternatives and similar repositories for fpga-sdrlib
Users that are interested in fpga-sdrlib are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A library for generating Software Defined Radio-intended DSP code for FPGAs that makes use of the MyHDL (www.myhdl.org) Python library. T…☆25Aug 29, 2012Updated 13 years ago
- Digital FM Radio Receiver for FPGA☆66Dec 26, 2015Updated 10 years ago
- Hardware Snappy decompressor☆12Sep 11, 2024Updated last year
- VHDL package to provide C-like string formatting☆15May 6, 2022Updated 4 years ago
- Software Defined Radio receiver in Marsohod2 Altera Cyclone III board☆50May 3, 2016Updated 10 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆33May 16, 2026Updated last week
- OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation☆14May 15, 2026Updated last week
- experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.☆23Feb 17, 2026Updated 3 months ago
- A synthesizable picmicro-midrange clone for FPGAs☆13Nov 8, 2019Updated 6 years ago
- ☆18Apr 2, 2020Updated 6 years ago
- Generator for VHDL regular expression matchers☆15Jan 11, 2021Updated 5 years ago
- FPGA Development toolset☆20Jun 15, 2017Updated 8 years ago
- LMAC Core1 - Ethernet 1G/100M/10M☆19Apr 3, 2023Updated 3 years ago
- TCL framework to package Vivado IP-Cores☆14May 18, 2022Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆24Oct 8, 2019Updated 6 years ago
- Fine Grain FPGA Overlay Architecture and Tools☆27Nov 5, 2021Updated 4 years ago
- Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC☆123Oct 18, 2016Updated 9 years ago
- Anti-Cancer Peptide Prediction with Deep Representation Learning Features☆11Jan 27, 2021Updated 5 years ago
- PyMTL3 wrapper of the Berkeley Hardfloat IP☆10Aug 9, 2023Updated 2 years ago
- AiMed面向中文医学的人工智能大语言模型期望实现有效处理医学知识问答、医学论文阅读、医学文献检索等任务和在医学科研中的应用。☆12Feb 8, 2025Updated last year
- ☆13Feb 8, 2021Updated 5 years ago
- PS/2 Keyboard IP written in VHDL for Xilinx FPGA☆17Jul 11, 2015Updated 10 years ago
- ☆36Jan 21, 2021Updated 5 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Electrical and Computer Engineering Capstone☆10Jan 23, 2017Updated 9 years ago
- ☆89May 4, 2017Updated 9 years ago
- MyBlaze is a synthesizable clone of the MicroBlaze Soft Processor written in MyHDL (http://www.myhdl.org). It started as a translation of…☆17May 30, 2013Updated 12 years ago
- 电子科大格院毕设LaTeX模板☆19Jan 17, 2025Updated last year
- An Open Source Link Protocol and Controller☆29Jul 26, 2021Updated 4 years ago
- An open-source VHDL library for FPGA design.☆32Jun 2, 2022Updated 3 years ago
- VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and …☆24Oct 29, 2025Updated 6 months ago
- spi memory controller☆24Jan 5, 2017Updated 9 years ago
- Effect of tokenization on transformers for biological sequence☆23Dec 31, 2025Updated 4 months ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- USB capture IP☆25Jun 6, 2020Updated 5 years ago
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 4 years ago
- This repository contains FPGA/HDL demonstrations several beamforming and radar designs. Simulink models and MATLAB reference code are pro…☆80Jul 26, 2023Updated 2 years ago
- DDR3 controller for nMigen (WIP)☆14Dec 25, 2023Updated 2 years ago
- A set of helpers to implement a text user interface (TUI) in a terminal.☆14Oct 5, 2022Updated 3 years ago
- Python Utilities to use Xilinx Vivado Tools from Python Scripts☆22Oct 18, 2020Updated 5 years ago
- A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.☆41Jun 10, 2021Updated 4 years ago