Alternatives and similar repositories for fpga-sdrlib

Users that are interested in fpga-sdrlib are comparing it to the libraries listed below

• lewiz-support / LMAC_CORE1
  LMAC Core1 - Ethernet 1G/100M/10M
  ☆18Updated 2 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆28Updated 4 years ago
• opalkelly-opensource / design-resources
  A collection of Opal Kelly provided design resources
  ☆17Updated 2 weeks ago
• fpga-soc / mil-std-1553b-soc
  development interface mil-std-1553b for system on chip
  ☆23Updated 7 years ago
• hukenovs / adc_configurator
  ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)
  ☆13Updated 7 years ago
• analogdevicesinc / testbenches
  Testbenches for HDL projects
  ☆22Updated last week
• PandABlocks / PandABlocks-FPGA
  VHDL functional blocks with their simulations and test sequences
  ☆20Updated this week
• oscimp / fpga_ip
  OscillatorIMP ecosystem FPGA IP sources
  ☆27Updated 4 months ago
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆35Updated 4 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed3
  DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8
  ☆15Updated 2 weeks ago
• TI-Bonn / vercolib_pcie
  VHDL PCIe Transceiver
  ☆31Updated 5 years ago
• OpenAutomationTechnologies / VHDL_IP-Cores
  ☆18Updated 5 years ago
• Bucknalla / ip_cores
  Verilog IP Cores & Tests
  ☆13Updated 7 years ago
• Cognoscan / VerilogCogs
  Verilog Modules for DSP functions and other common tasks to make FPGA development easier and more fun.
  ☆20Updated 10 years ago
• lnls-dig / dsp-cores
  Repository containing the DSP gateware cores
  ☆14Updated 3 weeks ago
• freecores / wdsp
  DSP WishBone Compatible Cores
  ☆14Updated 11 years ago
• linuxbest / ahci_mpi
  an sata controller using smallest resource.
  ☆16Updated 11 years ago
• lnls-dig / general-cores
  general-cores
  ☆21Updated 4 months ago
• Cognoscan / AxiCores
  AXI4-Compatible Verilog Cores, along with some helper modules.
  ☆17Updated 5 years ago
• Elphel / x393_sata
  mirror of https://git.elphel.com/Elphel/x393_sata
  ☆33Updated 5 years ago
• hellgate202 / crc_calc
  Simple and effective parallel CRC calculator written in synthesizable SystemVerilog
  ☆15Updated 6 years ago
• coralhu123 / KC705-AD9371
  The implementation of AD9371 on KC705
  ☆20Updated 5 months ago
• dpiegdon / verilog-can
  Verilog CAN controller that is compatible to the SJA 1000.
  ☆15Updated 4 years ago
• GSI-CS-CO / bel_projects
  GSI Timing Gateware and Tools
  ☆14Updated last week
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆23Updated last year
• KutuSystems / XilinxIP
  Xilinx IP repository
  ☆13Updated 7 years ago
• pbridd / lzrw1-compression-core
  This is the repository for a verilog implementation of a lzrw1 compression core
  ☆18Updated 7 years ago
• fcayci / vhdl-axis-uart
  UART to AXI Stream interface written in VHDL
  ☆17Updated 3 years ago
• FarisHijazi / LZ4-Decompressor-Verilog
  Designing and implementing LZ4 decompression algorithm in hardware (FPGA) using Verilog hardware description language
  ☆17Updated 6 years ago
• hdl-util / i2c
  Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
  ☆31Updated 5 years ago