USB serial device (CDC-ACM)
☆47Jun 28, 2020Updated 5 years ago
Alternatives and similar repositories for core_usb_uart
Users that are interested in core_usb_uart are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Basic USB-CDC device core (Verilog)☆90May 15, 2021Updated 5 years ago
- Cheapest UAC2 using STM32F407+USB3300☆22Feb 26, 2025Updated last year
- USB capture IP☆26Jun 6, 2020Updated 6 years ago
- ULPI Link Wrapper (USB Phy Interface)☆37May 3, 2020Updated 6 years ago
- Projects for the ECPiX-5 - a ECP5 FPGA board.☆14Jul 5, 2020Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- fork from https://gitee.com/crouchggj/STM32F4_USB_SoundCard☆16Aug 3, 2019Updated 6 years ago
- USB2Sniffer: High Speed USB 2.0 capture (for LambdaConcept USB2Sniffer hardware)☆59Jun 6, 2020Updated 6 years ago
- WCH CH569 SerDes Reverse Engineering☆30Aug 13, 2022Updated 3 years ago
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆190Mar 10, 2024Updated 2 years ago
- Open Source Windows UAC2 driver☆21Feb 24, 2013Updated 13 years ago
- Rust proof-of-concept for GPU waveform rendering☆13Jul 22, 2020Updated 5 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆100Jun 6, 2020Updated 6 years ago
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Feb 16, 2022Updated 4 years ago
- A simple implementation of the Karatsuba multiplication algorithm☆12Apr 2, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- FPGA-Based USB-Input Audio Digital to Analogue Converter☆17Jun 11, 2021Updated 4 years ago
- Test code to talk from STM32 MCU over FSMC to SDRAM on ICE40 FPGA☆30Dec 19, 2016Updated 9 years ago
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆35Jun 5, 2021Updated 5 years ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s☆30Aug 16, 2021Updated 4 years ago
- STM32 Hiperface Encoder circuit and software☆11Nov 14, 2023Updated 2 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆48Jan 14, 2021Updated 5 years ago
- MMC (and derivative standards) host controller☆25Sep 14, 2020Updated 5 years ago
- WISHBONE Builder☆15Sep 10, 2016Updated 9 years ago
- Audio controller (I2S, SPDIF, DAC)☆97Sep 1, 2019Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆35Mar 21, 2020Updated 6 years ago
- USB Full Speed PHY☆49May 3, 2020Updated 6 years ago
- miniSpartan6+ (Spartan6) FPGA based MP3 Player☆27Sep 2, 2019Updated 6 years ago
- DVI video out example for prjtrellis☆17Jan 20, 2019Updated 7 years ago
- Python LabTools for talking to GPIB instruments☆27Feb 8, 2018Updated 8 years ago
- LiteX LUNA USB stack integration☆14Jun 12, 2022Updated 3 years ago
- USB 2.0 Device IP Core☆75Oct 1, 2017Updated 8 years ago
- CHEAPEST USB ASYNC AUDIO USING STM32F401RB☆30Mar 17, 2024Updated 2 years ago
- KEXT for allowing the WiiU Gamecube controller adapter to be used in OSX☆11Mar 14, 2015Updated 11 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Digital audio equalizer created written in Verilog for Altera DE1 SoC FPGA board.☆12Aug 9, 2019Updated 6 years ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆81Apr 11, 2022Updated 4 years ago
- Open Source SSD Controller. NVMe and Lightstor variants☆17May 21, 2014Updated 12 years ago
- LVGL + Micropython + Blockly☆19Jan 6, 2021Updated 5 years ago
- I2S transciever implemented in Verilog HDL☆34Oct 11, 2017Updated 8 years ago
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Apr 22, 2024Updated 2 years ago
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago