Alternatives and similar repositories for ssd-controller

Users that are interested in ssd-controller are comparing it to the libraries listed below

• fpgasystems / groundhog
  Groundhog - Serial ATA Host Bus Adapter
  ☆24Updated 7 years ago
• giuseppedongiovanni / nvme_comp_storage
  Computational Storage Device based on the open source project OpenSSD.
  ☆29Updated 5 years ago
• mcrl / NVMe
  ☆35Updated 2 years ago
• maswx / vu13p_corundum
  corundum work on vu13p
  ☆22Updated 2 years ago
• Reconfigurable-Computing / HLStoFPGA
  ☆12Updated 3 years ago
• FPGA-Networking / HyperParser
  ☆34Updated 3 years ago
• alexforencich / dma-bench
  ☆27Updated 3 years ago
• yhqiu16 / OCOWFC
  Open-Channel Open-Way Flash Controller
  ☆19Updated 4 years ago
• FDU-ME-ARC / NVMeCHA
  ☆19Updated 4 years ago
• CospanDesign / verilog_ppfifo_demo
  Simple demo showing how to use the ping pong FIFO
  ☆16Updated 9 years ago
• hellgate202 / crc_calc
  Simple and effective parallel CRC calculator written in synthesizable SystemVerilog
  ☆15Updated 6 years ago
• fatestudio / RSA4096_NEW
  ☆13Updated 10 years ago
• pbridd / lzrw1-compression-core
  This is the repository for a verilog implementation of a lzrw1 compression core
  ☆18Updated 8 years ago
• donlon / axi-dma-controller
  Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. This project was an interview assignment. Work in Progress.
  ☆12Updated last year
• iammituraj / skid_buffer
  Skid Buffer and Pipeline Skid Buffer designed in Verilog/System Verilog.
  ☆26Updated last month
• Xilinx / pcie-model
  PCI Express controller model
  ☆71Updated 3 years ago
• shengwenliang / fpga-nvme-controller
  Chisel NVMe controller
  ☆25Updated 3 years ago
• hpcn-uam / efficient_checksum-offload-engine
  Checksum plays a key role in the TCP/IP headers. In this repo you'll find a efficient FPGA-based solution for a 512-bit AXI4-Stream inter…
  ☆18Updated 6 years ago
• ultraembedded / core_jpeg_decoder
  HW JPEG decoder wrapper with AXI-4 DMA
  ☆36Updated 5 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆71Updated 7 months ago
• d953i / Custom_Part_Data_Files
  Xilinx PCIe to MIG DDR4 example designs and custom part data files
  ☆39Updated last year
• Essenceia / ethernet-physical-layer
  RTL implementation of the ethernet physical layer PCS for 10GBASE-R and 40GBASE-R.
  ☆32Updated last year
• corundum / verilog-pcie
  Verilog PCI express components
  ☆24Updated 2 years ago
• DUNE / pl-nvme
  ☆36Updated 5 years ago
• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆32Updated 9 years ago
• Reconfigurable-Computing / Xilinx-FPGA-PCIe-XDMA-Tutorial
  Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
  ☆26Updated 3 years ago
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆39Updated 5 years ago
• antmicro / openssd-nvme
  ☆33Updated 4 years ago
• corundum / ethernet-switch
  Ethernet switch implementation written in Verilog
  ☆55Updated 2 years ago
• CMU-SAFARI / MIG-7-PHY-DDR3-Controller
  A DDR3 Controller that uses the Xilinx MIG-7 PHY to interface with DDR3 devices.
  ☆11Updated 4 years ago