Alternatives and similar repositories for OCOWFC

Users that are interested in OCOWFC are comparing it to the libraries listed below

• haifengch / axi_interconnect
  ☆26Updated 4 months ago
• yhqiu16 / NVMeCHA
  NVMe Controller featuring Hardware Acceleration
  ☆97Updated 4 years ago
• antmicro / nvme-verilog-pcie
  ☆79Updated 3 years ago
• yu-zou / DirectNVM
  An open-source RTL NVMe controller IP for Xilinx FPGA.
  ☆56Updated 4 years ago
• govindjeevan / Weighted-Round-Robin-Arbiter
  Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components
  ☆20Updated 7 years ago
• brown9804 / PCIe-Physical-Layer
  Implementation of the PCIe physical layer
  ☆56Updated 4 months ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆43Updated 4 years ago
• fpgasystems / groundhog
  Groundhog - Serial ATA Host Bus Adapter
  ☆24Updated 7 years ago
• lewiz-support / LMAC_CORE3
  Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps
  ☆45Updated 2 years ago
• wanderingnail / AXI_DMA
  ☆20Updated 2 years ago
• pulp-platform / axi_spi_master
  ☆21Updated 6 years ago
• muzafferkal / axi-bfm
  AXI3 Bus Functional Models (Initiator & Target)
  ☆29Updated 2 years ago
• funannoka / SoC-Design-DDR3-Controller
  DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog
  ☆31Updated 7 years ago
• crypt-xie / XCryptCore
  Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)
  ☆41Updated 5 years ago
• abdelrhman-oun / DDR5_PHY_WriteOperation
  ☆65Updated 3 years ago
• alexforencich / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆68Updated 2 months ago
• ultraembedded / core_axi_cache
  128KB AXI cache (32-bit in, 256-bit out)
  ☆53Updated 4 years ago
• RoaLogic / ahb3lite_apb_bridge
  Parameterised Asynchronous AHB3-Lite to APB4 Bridge.
  ☆48Updated last year
• pulp-platform / axi_llc
  ☆30Updated 3 weeks ago
• ZipCPU / wbsata
  Wishbone SATA Controller
  ☆21Updated 3 weeks ago
• vinodsake / NAND-Flash-Memory-Controller-verification
  ☆44Updated 8 years ago
• mcjtag / eth_switch
  Verilog Ethernet Switch (layer 2)
  ☆49Updated 2 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆67Updated 6 months ago
• FPGA-Networking / HyperParser
  ☆34Updated 3 years ago
• giuseppedongiovanni / nvme_comp_storage
  Computational Storage Device based on the open source project OpenSSD.
  ☆28Updated 5 years ago
• iammituraj / skid_buffer
  Skid Buffer and Pipeline Skid Buffer designed in Verilog/System Verilog.
  ☆26Updated last week
• tej-chavan / Design-and-Verification-of-DDR3-Memory-Controller
  The memory model was leveraged from micron.
  ☆24Updated 7 years ago
• 2cc2ic / DMA-S2MM-and-MM2S
  Build an open source, extremely simple DMA.
  ☆22Updated 6 years ago
• chipsalliance / aib-protocols
  ☆28Updated last year
• nguyenquanicd / AllArbiterRTLCode
  RTL code of some arbitration algorithm
  ☆14Updated 6 years ago