ultraembedded / minispartan6-audio
miniSpartan6+ (Spartan6) FPGA based MP3 Player
☆25Updated 5 years ago
Related projects ⓘ
Alternatives and complementary repositories for minispartan6-audio
- Minimal DVI / HDMI Framebuffer☆74Updated 4 years ago
- Wishbone interconnect utilities☆36Updated 5 months ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆18Updated 3 weeks ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆39Updated 3 years ago
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆27Updated 3 years ago
- Portable HyperRAM controller☆48Updated 2 weeks ago
- USB Full Speed PHY☆39Updated 4 years ago
- Example Verilog code for Ulx3s☆40Updated 2 years ago
- Tools for FPGA development.☆44Updated last year
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆69Updated 7 months ago
- Verilog Repository for GIT☆29Updated 3 years ago
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆48Updated last year
- Small (Q)SPI flash memory programmer in Verilog☆55Updated 2 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆58Updated 5 years ago
- ULPI Link Wrapper (USB Phy Interface)☆24Updated 4 years ago
- USB DFU bootloader gateware / firmware for FPGAs☆60Updated last month
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆22Updated 4 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆85Updated 4 years ago
- RMII Firewall FPGA☆18Updated 4 years ago
- SDRAM controller with multiple wishbone slave ports☆27Updated 6 years ago
- Demo projects for various Kintex FPGA boards☆46Updated 5 months ago
- VHDL Modules☆23Updated 9 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆18Updated 9 months ago
- Collection of projects for various FPGA development boards☆41Updated 5 months ago
- ☆31Updated 9 months ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆36Updated 6 months ago
- FPGA USB 1.1 Low-Speed Implementation☆33Updated 6 years ago
- A set of Wishbone Controlled SPI Flash Controllers☆75Updated 2 years ago
- Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency☆19Updated 5 years ago
- A complete HDMI transmitter implementation in VHDL☆19Updated this week