Alternatives and similar repositories for minispartan6-audio:

Users that are interested in minispartan6-audio are comparing it to the libraries listed below

• ultraembedded / core_ulpi_wrapper
  ULPI Link Wrapper (USB Phy Interface)
  ☆25Updated 4 years ago
• ultraembedded / core_dvi_framebuffer
  Minimal DVI / HDMI Framebuffer
  ☆79Updated 4 years ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆39Updated 2 months ago
• nand2mario / ddr3-tang-primer-20k
  DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.
  ☆54Updated last year
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆89Updated 4 years ago
• gtjennings1 / HyperBUS
  A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs
  ☆61Updated 6 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆44Updated 4 years ago
• MJoergen / HyperRAM
  Portable HyperRAM controller
  ☆54Updated 4 months ago
• sergachev / spi_mem_programmer
  Small (Q)SPI flash memory programmer in Verilog
  ☆61Updated 2 years ago
• chili-chips-ba / openXC7-TetriSaraj
  Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…
  ☆25Updated 2 months ago
• defparam / PCI2Nano-RTL
  An open source FPGA PCI core & 8250-Compatible PCI UART core
  ☆41Updated 4 years ago
• GMM-7550 / gmm7550-hardware
  CologneChip GateMate FPGA Module: GMM-7550
  ☆21Updated last year
• ultraembedded / core_ftdi_bridge
  FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge
  ☆32Updated 3 years ago
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆79Updated 2 years ago
• projf / fpgatools
  Tools for FPGA development.
  ☆44Updated last year
• sam210723 / fpga
  Collection of projects for various FPGA development boards
  ☆44Updated 11 months ago
• esynr3z / proto245
  🔴 SystemVerilog FPGA cores to communicate with FTDI Synchronous/Asynchronous FIFOs (FT245 protocol)
  ☆41Updated 3 years ago
• BrianHGinc / BrianHG-DDR3-Controller
  DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…
  ☆76Updated last year
• CoreyChen922 / sata_2_host_controller
  Sata 2 Host Controller for FPGA implementation
  ☆14Updated 7 years ago
• MatejGomboc / Verilog-I2S-Transciever
  I2S transciever implemented in Verilog HDL
  ☆30Updated 7 years ago
• ultraembedded / core_usb_uart
  USB serial device (CDC-ACM)
  ☆38Updated 4 years ago
• CospanDesign / nysa-verilog
  Verilog Repository for GIT
  ☆32Updated 3 years ago
• ChinaQMTECH / QMTECH_XC7K325T_CORE_BOARD
  ☆37Updated 3 years ago
• pecostm32 / Anlogic_AL3-10_Analyzing
  An attempt to reverse engineer a bitstream made for an AL3-10 FPGA
  ☆14Updated 2 years ago
• ultraembedded / core_usb_cdc
  Basic USB-CDC device core (Verilog)
  ☆77Updated 3 years ago
• jakubcabal / rmii-firewall-fpga
  RMII Firewall FPGA
  ☆23Updated 5 years ago
• ZipCPU / wbi2c
  Wishbone controlled I2C controllers
  ☆48Updated 5 months ago
• zf3 / psram-tang-nano-9k
  An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA
  ☆74Updated 2 years ago
• Juninho99 / FPGA_TangNano20k_Hand_Coded_DIP_LCD_Camera
  Master-thesis-final
  ☆19Updated last year
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆38Updated 11 months ago