Zeba-Xie / Open-USB2.0-Device-ControllerLinks
USB2.0 Device Controller IP Core
☆14Updated 2 years ago
Alternatives and similar repositories for Open-USB2.0-Device-Controller
Users that are interested in Open-USB2.0-Device-Controller are comparing it to the libraries listed below
Sorting:
- Verilog Code for a JPEG Decoder☆34Updated 7 years ago
- HW JPEG decoder wrapper with AXI-4 DMA☆36Updated 5 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆91Updated last year
- SPI-Flash XIP Interface (Verilog)☆48Updated 4 years ago
- Quad SPI Flash XIP Controller with a direct mapped cache☆12Updated 5 years ago
- USB 2.0 Device IP Core☆74Updated 8 years ago
- Video Stream Scaler☆40Updated 11 years ago
- 【例程】国产高云FPGA 开发板及其工程☆43Updated last year
- ☆16Updated 6 years ago
- ☆38Updated 10 years ago
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆32Updated 7 years ago
- Ethernet MAC 10/100 Mbps☆83Updated 6 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆34Updated 5 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆21Updated 8 years ago
- QSPI for SoC☆23Updated 6 years ago
- RTL Verilog library for various DSP modules☆94Updated 3 years ago
- USB2.0 Verilog☆19Updated 6 years ago
- SDRAM controller with AXI4 interface☆100Updated 6 years ago
- ☆34Updated 4 years ago
- xkDLA:XinKai Deep Learning Accelerator (RTL)☆39Updated 2 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆68Updated 5 years ago
- USB -> AXI Debug Bridge☆42Updated 4 years ago
- APV21B - Real-time Video 16X Bicubic Super-resolution IP, AXI4-Stream Video Interface Compatible, 4K 60FPS☆28Updated 2 years ago
- Interface Protocol in Verilog☆51Updated 6 years ago
- IP operations in verilog (simulation and implementation on ice40)☆62Updated 6 years ago
- Implementation of the PCIe physical layer☆60Updated 6 months ago
- Ethernet MAC 10/100 Mbps☆31Updated 4 years ago
- ☆14Updated 6 years ago
- configurable cordic core in verilog☆53Updated 11 years ago
- use Verilog HDL implemente bicubic interpolation in FPGA☆29Updated 6 years ago