A High-Level DRAM Timing, Power and Area Exploration Tool
☆29Jul 29, 2020Updated 5 years ago
Alternatives and similar repositories for DRAMSpec
Users that are interested in DRAMSpec are comparing it to the libraries listed below
Sorting:
- ☆19Jun 1, 2023Updated 2 years ago
- ☆22Feb 18, 2025Updated last year
- Source code for the architectural simulator used for modeling the PUD system proposed in our HPCA 2024 paper `MIMDRAM: An End-to-End Proc…☆29Sep 12, 2025Updated 5 months ago
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆41Mar 1, 2019Updated 7 years ago
- This repository integrates gem5 with Ramulator2, allowing gem5 to use Ramulator2 as its DRAM memory model. With the provided materials an…☆13Jun 7, 2025Updated 8 months ago
- A survey of manufacturer-provided DRAM operating parameters and timings as specified by DRAM chip datasheets from between 1970 and 2021. …☆11May 4, 2022Updated 3 years ago
- ☆14Oct 11, 2024Updated last year
- A new DRAM substrate that mitigates the excessive energy consumption from both (i) transmitting unused data on the memory channel and (i…☆13Aug 23, 2024Updated last year
- An open-sourced PyTorch library for developing energy efficient multiplication-less models and applications.☆14Feb 3, 2025Updated last year
- Circuit-level model for the Capacity-Latency Reconfigurable DRAM (CLR-DRAM) architecture. This repository contains the SPICE models of th…☆14Sep 24, 2020Updated 5 years ago
- HDL Obfuscator☆12May 13, 2021Updated 4 years ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Jun 12, 2021Updated 4 years ago
- Hybrid Memory Cube Simulation & Research Infrastructure☆17Jun 9, 2025Updated 8 months ago
- A comprehensive content-addressable accelerator simulation framework.☆20Nov 15, 2024Updated last year
- This is where gem5 based DRAM cache models live.☆20Mar 23, 2023Updated 2 years ago
- DRAMSys a SystemC TLM-2.0 based DRAM simulator.☆338Feb 16, 2026Updated 2 weeks ago
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆45Jul 28, 2017Updated 8 years ago
- [TRETS'23, FPT'20] CHIP-KNN: Configurable and HIgh-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs☆18Apr 9, 2024Updated last year
- Benchmark suite containing cache filtered traces for use with Ramulator. These include some of the workloads used in our SIGMETRICS 2019 …☆23Oct 9, 2020Updated 5 years ago
- DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator☆450Aug 3, 2024Updated last year
- Artifacts for the SCVP lecture☆12Nov 17, 2021Updated 4 years ago
- ARTICo³ - Dynamic and Partially Reconfigurable Architecture for Run-Time Adaptive, High Performance Embedded Computing☆12Sep 10, 2024Updated last year
- Processing in Memory Emulation☆23Feb 24, 2023Updated 3 years ago
- The wafer-native AI accelerator simulation platform and inference engine.☆50Jan 1, 2026Updated 2 months ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆182Oct 1, 2022Updated 3 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆72Dec 11, 2023Updated 2 years ago
- A fast and scalable x86-64 multicore simulator☆31Mar 16, 2021Updated 4 years ago
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆59Jul 22, 2025Updated 7 months ago
- Benchmarks for Accelerator Design and Customized Architectures☆136Apr 1, 2020Updated 5 years ago
- ☆11Mar 14, 2023Updated 2 years ago
- ☆11May 16, 2025Updated 9 months ago
- ☆13Jan 8, 2020Updated 6 years ago
- ☆40Mar 2, 2023Updated 3 years ago
- A general framework for optimizing DNN dataflow on systolic array☆39Jan 2, 2021Updated 5 years ago
- PIN-tool to produce multi-threaded atomic memory traces☆37Oct 22, 2013Updated 12 years ago
- Arche is a Greek word with primary senses "beginning". The repository defines a framework for technology mapping of emerging technologies…☆11May 15, 2020Updated 5 years ago
- Special Function Units (SFUs) are hardware accelerators, their implementation helps improve the performance of GPUs to process some of th…☆16Sep 21, 2025Updated 5 months ago
- Number Geometry methods: Shortest Vector Problem and Shorter Basis Problem in Lattice (Hamming distance, Bounded distance decoding, bina…☆13May 19, 2023Updated 2 years ago
- Belief propagation with sparse matrices (scipy.sparse) in Python for LDPC codes. Includes NumPy implementation of message passing (min-su…☆36Aug 20, 2022Updated 3 years ago