tukl-msd / DRAMSpec

Related projects ⓘ

Alternatives and complementary repositories for DRAMSpec

• CMU-SAFARI / VAMPIRE
  An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …
  ☆37Updated 5 years ago
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆46Updated 7 years ago
• cornell-brg / pymtl3-net
  Project repo for the POSH on-chip network generator
  ☆43Updated last year
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆59Updated 11 months ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆47Updated 4 months ago
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆116Updated 4 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆59Updated 3 years ago
• seldridge / rocket-rocc-examples
  Tests for example Rocket Custom Coprocessors
  ☆69Updated 4 years ago
• lana555 / dynamatic
  ☆87Updated 8 months ago
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆113Updated last week
• whatmough / CHIPKIT
  CHIPKIT: An agile, reusable open-source framework for rapid test chip development
  ☆39Updated 4 years ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆65Updated 3 years ago
• amin-norollah / PAT-Noxim
  cycle accurate Network-on-Chip Simulator
  ☆25Updated last year
• CMU-SAFARI / NOCulator
  NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…
  ☆22Updated last year
• FCAS-LAB / chiplet_simulators
  A list of our chiplet simulaters
  ☆21Updated 3 years ago
• GT-CHIPS / gem5_chips
  gem5 repository to study chiplet-based systems
  ☆67Updated 5 years ago
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆38Updated last year
• TeCSAR-UNCC / gem5-SALAM
  ☆84Updated 9 months ago
• gthparch / HBM
  High Bandwidth Memory (HBM) timing model based on DRAMSim2
  ☆41Updated 7 years ago
• tancheng / VectorCGRA
  CGRA framework with vectorization support.
  ☆19Updated this week
• ic-lab-duth / NoCpad
  HLS for Networks-on-Chip
  ☆31Updated 3 years ago
• FCAS-LAB / Chiplet-Gem5-SharedMemory
  ☆24Updated 5 months ago
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆64Updated 5 years ago
• UCLA-VAST / hbmbench
  ☆23Updated 3 years ago
• tancheng / CGRA-Mapper
  An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
  ☆56Updated this week
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆13Updated 2 years ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆29Updated 2 years ago
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆57Updated 3 months ago
• spcl / rapidchiplet
  A toolchain for rapid design space exploration of chiplet architectures
  ☆33Updated 6 months ago
• CGCL-codes / ScalaBFS
  A Scalable BFS Accelerator on FPGA-HBM Platform
  ☆13Updated 9 months ago