reference block design for the ASAP7nm library in Cadence Innovus
☆59Jun 25, 2024Updated last year
Alternatives and similar repositories for asap7_reference_design
Users that are interested in asap7_reference_design are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Project of an integrated UART: RTL, Verification, Physical Implementation (Innovus) and GDSII.☆16May 28, 2021Updated 4 years ago
- DTMF Receiver: Logic Synthesis and Physical Design using genus and innovus in 90nm process node☆14Dec 1, 2023Updated 2 years ago
- cadence flow for genus and innovus with UPF added.☆16Jul 3, 2021Updated 4 years ago
- KLayout technology files for ASAP7 FinFET educational process☆25Feb 5, 2023Updated 3 years ago
- Supplemental technology files for ASAP7 PDK with Synopsys design flow☆23Jan 27, 2023Updated 3 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- ☆45Mar 2, 2023Updated 3 years ago
- ☆54Apr 8, 2024Updated last year
- Re-host of ISCAS89 sequential benchmark circuits in higher level verilog (without "DFF")☆16Dec 3, 2021Updated 4 years ago
- ☆31Apr 23, 2024Updated last year
- This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of raven_soc which was taped-out by Efables…☆43Jun 3, 2020Updated 5 years ago
- ☆252Mar 12, 2025Updated last year
- Electronic circuit analysis in Clojure using Modified Nodal Analysis.☆10Jan 27, 2015Updated 11 years ago
- Characterizer☆32Nov 19, 2025Updated 4 months ago
- ☆43Nov 28, 2022Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of ORCA which was taped-out by NTI.☆28Feb 11, 2024Updated 2 years ago
- ☆99Jun 24, 2025Updated 9 months ago
- An end-to-end chip authentication architecture based on SRAM PUF and public key cryptography.☆17Nov 22, 2019Updated 6 years ago
- A Bitcoin mining ASIC☆12Dec 2, 2022Updated 3 years ago
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆23May 24, 2025Updated 10 months ago
- ☆29Jun 23, 2023Updated 2 years ago
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆31Jan 17, 2020Updated 6 years ago
- This is a deep-learning based model for Electronic Design Automation(EDA), predicting the congestion location.☆24Aug 28, 2024Updated last year
- Library of open source PDKs☆68Updated this week
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- ☆22Oct 1, 2018Updated 7 years ago
- An open source PDK using TIGFET 10nm devices.☆57Dec 19, 2022Updated 3 years ago
- ☆15Mar 18, 2026Updated last week
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆212Mar 8, 2020Updated 6 years ago
- [CVPR 2025 Highlight] FIMA-Q: Post-Training Quantization for Vision Transformers by Fisher Information Matrix Approximation☆25Jun 16, 2025Updated 9 months ago
- Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source☆312Jan 5, 2026Updated 2 months ago
- Delay Calculation ToolKit☆32Aug 7, 2022Updated 3 years ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆53Jan 4, 2022Updated 4 years ago
- ☆23Mar 12, 2026Updated 2 weeks ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Simple Simulator of ARMv6m instructions☆18May 23, 2017Updated 8 years ago
- GDS visualization, geometry analysis, and parallelized capacitance extraction at field-solver accuracy. MS thesis project.☆25Jul 1, 2024Updated last year
- ☆26Apr 24, 2021Updated 4 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆38Jan 13, 2023Updated 3 years ago
- My second attempt at a RISC-V CPU with learnings form my previous attempt.☆10Apr 29, 2024Updated last year
- ☆196Aug 30, 2021Updated 4 years ago
- A cycle-accurate RISC-V CPU simulator + RTL modeling library in pure Python.☆18Aug 27, 2025Updated 6 months ago