Alternatives and similar repositories for cs1410-40

Users that are interested in cs1410-40 are comparing it to the libraries listed below

• tsung-wei-huang / ece5960
  Advanced Programming for Computer Design Problems
  ☆17Updated 4 years ago
• tsung-wei-huang / ece6960-heterogeneous-programming
  Heterogeneous Programming
  ☆17Updated 2 years ago
• Heteroflow / Heteroflow
  Concurrent CPU-GPU Programming using Task Models
  ☆104Updated 5 years ago
• NVlabs / iccad2020-GPUgatesim
  ☆14Updated 5 years ago
• spcl / FBLAS
  BLAS implementation for Intel FPGA
  ☆77Updated 5 years ago
• Xilinx / hydra
  ☆13Updated 3 years ago
• ckchengucsd / ILP-SAT-Detailed-Router
  ILP SAT Detailed Router
  ☆12Updated 5 years ago
• hriener / lorina
  C++ parsing library for simple formats used in logic synthesis and formal verification
  ☆37Updated last year
• StanfordAHA / Halide-to-Hardware_archive
  ☆82Updated 9 months ago
• risia / CUDA-SPICE-Circuit-Sim
  ☆17Updated 6 years ago
• spcl / apfp
  FPGA acceleration of arbitrary precision floating point computations.
  ☆40Updated 3 years ago
• dillonhuff / clockwork
  A polyhedral compiler for hardware accelerators
  ☆59Updated last year
• limbo018 / OpenTimer
  A High-performance Timing Analysis Tool for VLSI Systems
  ☆10Updated 4 years ago
• mattsinc / heterosync
  HeteroSync is a benchmark suite for performing fine-grained synchronization on tightly coupled GPUs
  ☆30Updated last year
• daitoto / EDA-wiki
  EDA wiki
  ☆53Updated 2 years ago
• tsung-wei-huang / DtCraft
  A High-performance Cluster Computing Engine
  ☆147Updated 6 years ago
• UCLA-VAST / soda
  Stencil with Optimized Dataflow Architecture
  ☆17Updated last year
• leonardt / verilogAST-cpp
  C++17 implementation of an AST for Verilog code generation
  ☆24Updated 2 years ago
• spcl / SMI
  Streaming Message Interface: High-Performance Distributed Memory Programming on Reconfigurable Hardware
  ☆15Updated 3 years ago
• Junyi-Liu / benchmarks-HLS
  Benchmarks, testbenches, and transformed codes for high-level synthesis research
  ☆13Updated 8 years ago
• spcl / stencilflow
  ☆17Updated 4 years ago
• ngiambla / libmem
  ☆10Updated 2 years ago
• NUCAR-DEV / Hetero-Mark
  A Benchmark Suite for Heterogeneous System Computation
  ☆54Updated 9 months ago
• hipacc / hipacc
  A domain-specific language and compiler for image processing
  ☆77Updated 4 years ago
• Blaok / tapa
  TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…
  ☆19Updated last year
• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆24Updated last year
• aolofsson / POSH
  ☆44Updated 5 years ago
• triSYCL / sycl
  SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
  ☆121Updated last year
• scale-lab / la-core
  Linear algebra accelerators for RISC-V (published in ICCD 17)
  ☆67Updated 8 years ago
• usnistgov / hedgehog
  ☆33Updated 3 months ago