tsung-wei-huang / ece5960Links
Advanced Programming for Computer Design Problems
☆17Updated 4 years ago
Alternatives and similar repositories for ece5960
Users that are interested in ece5960 are comparing it to the libraries listed below
Sorting:
- Object-Oriented Programming☆12Updated 4 years ago
- Heterogeneous Programming☆17Updated 2 years ago
- ILP SAT Detailed Router☆12Updated 5 years ago
- ☆14Updated 5 years ago
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆67Updated 8 years ago
- netlistDB - Intermediate format for digital hardware representation with graph database API☆32Updated 4 years ago
- Concurrent CPU-GPU Programming using Task Models☆105Updated 6 years ago
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆62Updated last year
- A High-performance Timing Analysis Tool for VLSI Systems☆10Updated 4 years ago
- BLAS implementation for Intel FPGA☆78Updated 5 years ago
- ☆13Updated 3 years ago
- EDA wiki☆53Updated 2 years ago
- Custom BLAS and LAPACK Cross-Compilation Framework for RISC-V☆18Updated 5 years ago
- Streaming Message Interface: High-Performance Distributed Memory Programming on Reconfigurable Hardware☆15Updated 3 years ago
- C++ parsing library for simple formats used in logic synthesis and formal verification☆38Updated last year
- ☆17Updated 7 years ago
- OpenPiton Design Benchmark☆28Updated 2 years ago
- Benchmarks, testbenches, and transformed codes for high-level synthesis research☆13Updated 8 years ago
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆48Updated last year
- A GPU acceleration flow for RTL simulation with batch stimulus☆116Updated last year
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 6 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated last year
- ☆44Updated 5 years ago
- ☆33Updated 5 years ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆25Updated last year
- Hands-on experience programming AI Engines using Vitis Unified Software Platform☆40Updated last year
- EDA physical synthesis optimization kit☆64Updated 2 years ago
- An open multiple patterning framework☆81Updated last year
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Updated 3 years ago
- Next generation CGRA generator☆118Updated last week