SMT-based-STDCELL-Layout-Generator
☆18Sep 30, 2021Updated 4 years ago
Alternatives and similar repositories for SMT-based-STDCELL-Layout-Generator
Users that are interested in SMT-based-STDCELL-Layout-Generator are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆19Jul 22, 2020Updated 5 years ago
- ILP SAT Detailed Router☆13Apr 14, 2020Updated 6 years ago
- ☆56Apr 8, 2024Updated 2 years ago
- Mirror of Synopsys's Liberty parser library☆24Jul 6, 2018Updated 7 years ago
- ☆37May 8, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Logic optimization and technology mapping tool.☆20Oct 12, 2023Updated 2 years ago
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆57May 4, 2026Updated 2 weeks ago
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆26May 24, 2025Updated last year
- 9 track standard cells for GF180MCU provided by GlobalFoundries.☆18Dec 5, 2022Updated 3 years ago
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆29Feb 18, 2021Updated 5 years ago
- Implementation of the ePlace algorithm on the AMD Versal architecture, utilizing AIE, PL, and PS regions of the chip.☆11Apr 23, 2026Updated last month
- ☆21Nov 29, 2022Updated 3 years ago
- ☆36Aug 23, 2022Updated 3 years ago
- Copyleftist's Standard Cell Library☆102May 2, 2024Updated 2 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- Python iterface for Cadence LEF/DEF parser.☆38Oct 31, 2023Updated 2 years ago
- Optimal gate sizing of digital circuits using geometric programming☆11Aug 18, 2016Updated 9 years ago
- IRSIM switch-level simulator for digital circuits☆36Nov 13, 2025Updated 6 months ago
- Selected problems and their solutions from the book on "Machine Intelligence in Design Automation"☆27Dec 9, 2018Updated 7 years ago
- DEPRECATED, PLEASE USE https://github.com/lp-solve/lp_solve . Was: Mirror of lp_solve which used to be hosted on SourceForge.☆27May 7, 2014Updated 12 years ago
- BAG (BAG AMS Generator) Primitives Library for SKY130☆20May 16, 2023Updated 3 years ago
- LAYout with Gridded Objects☆34Jun 18, 2020Updated 5 years ago
- tools regarding on analog modeling, validation, and generation☆23Apr 11, 2023Updated 3 years ago
- ☆20Jul 15, 2024Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆26Mar 11, 2023Updated 3 years ago
- A collection of big designs to run post-synthesis simulations with yosys☆51Oct 27, 2015Updated 10 years ago
- DATC Robust Design Flow.☆36Jan 21, 2020Updated 6 years ago
- AMC: Asynchronous Memory Compiler☆55Jun 29, 2020Updated 5 years ago
- Educational Design Kit for Synopsys Tools with a set of Characterized Standard Cell Library☆37Jan 18, 2022Updated 4 years ago
- DATC RDF☆49Jul 31, 2020Updated 5 years ago
- Artificial Netlist Generator☆46Mar 19, 2024Updated 2 years ago
- ☆39Apr 10, 2023Updated 3 years ago
- Machine Generated Analog IC Layout☆286Apr 24, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆31Jul 18, 2024Updated last year
- Code for new techniques of VLSI placement☆13Oct 11, 2013Updated 12 years ago
- An automatic schematic generation tool which generates schematics from a SPICE netlist, usually of output from qflow.☆30Oct 25, 2020Updated 5 years ago
- My personal Electronics projects versioning repo.☆13Dec 9, 2013Updated 12 years ago
- cpp parser for reading a VCD (value change dump) file☆10Jul 15, 2013Updated 12 years ago
- Characterizer☆37Nov 19, 2025Updated 6 months ago
- ☆13Nov 3, 2023Updated 2 years ago