Alternatives and similar repositories for ece6960-heterogeneous-programming

Users that are interested in ece6960-heterogeneous-programming are comparing it to the libraries listed below

• tsung-wei-huang / ece5960
  Advanced Programming for Computer Design Problems
  ☆17Updated 4 years ago
• Heteroflow / Heteroflow
  Concurrent CPU-GPU Programming using Task Models
  ☆103Updated 5 years ago
• tsung-wei-huang / cs1410-40
  Object-Oriented Programming
  ☆12Updated 4 years ago
• tsung-wei-huang / DtCraft
  A High-performance Cluster Computing Engine
  ☆147Updated 6 years ago
• dian-lun-lin / SNIG
  SNIG: Accelerated Large Sparse Neural Network Inference using Task Graph Parallelism
  ☆34Updated 3 years ago
• Brilight / DeePEB
  [ICCAD 22]DeePEB: A neural network based PEB solver
  ☆11Updated 2 years ago
• spcl / FBLAS
  BLAS implementation for Intel FPGA
  ☆77Updated 4 years ago
• verilog-to-routing / tatum
  Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
  ☆62Updated last year
• tsung-wei-huang / ece5960-physical-design
  ☆39Updated 2 years ago
• NVlabs / iccad2020-GPUgatesim
  ☆14Updated 5 years ago
• hriener / lorina
  C++ parsing library for simple formats used in logic synthesis and formal verification
  ☆37Updated last year
• daitoto / EDA-wiki
  EDA wiki
  ☆53Updated 2 years ago
• triSYCL / sycl
  SYCL for Vitis: Experimental fusion of triSYCL with Intel SYCL oneAPI DPC++ up-streaming effort into Clang/LLVM
  ☆120Updated 10 months ago
• leonardt / verilogAST-cpp
  C++17 implementation of an AST for Verilog code generation
  ☆24Updated 2 years ago
• cornell-zhang / hcl-dialect
  HeteroCL-MLIR dialect for accelerator design
  ☆41Updated 11 months ago
• Xilinx / ACCL
  Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
  ☆97Updated 2 months ago
• geochrist / dctk
  Delay Calculation ToolKit
  ☆32Updated 3 years ago
• pku-liang / HASCO
  agile hardware-software co-design
  ☆50Updated 3 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆92Updated last year
• kahypar / mt-kahypar
  Mt-KaHyPar (Multi-Threaded Karlsruhe Hypergraph Partitioner) is a shared-memory multilevel graph and hypergraph partitioner equipped with…
  ☆154Updated last week
• Xilinx / hydra
  ☆13Updated 3 years ago
• MPSLab-ASU / ccf
  CGRA Compilation Framework
  ☆86Updated 2 years ago
• Zaoldyeckk / High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
  This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…
  ☆54Updated 7 years ago
• he-actlab / polymath
  ☆22Updated 6 months ago
• PrincetonUniversity / OPDB
  OpenPiton Design Benchmark
  ☆25Updated 2 years ago
• hipacc / hipacc
  A domain-specific language and compiler for image processing
  ☆76Updated 4 years ago
• risia / CUDA-SPICE-Circuit-Sim
  ☆17Updated 6 years ago
• GT-CHIPS / gem5_chips
  gem5 repository to study chiplet-based systems
  ☆81Updated 6 years ago
• Xilinx / xup_aie_training
  Hands-on experience programming AI Engines using Vitis Unified Software Platform
  ☆41Updated last year
• cornell-zhang / heterocl
  HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing
  ☆340Updated last year