Jefferyy-Peng / AXI_DMA_CONTROLLERLinks
☆11Updated 2 years ago
Alternatives and similar repositories for AXI_DMA_CONTROLLER
Users that are interested in AXI_DMA_CONTROLLER are comparing it to the libraries listed below
Sorting:
- ☆16Updated 6 years ago
- PCIe System Verilog Verification Environment developed for PCIe course☆13Updated last year
- ☆20Updated 3 years ago
- ☆20Updated 3 years ago
- OpenExSys_NoC a mesh-based network on chip IP.☆18Updated 2 years ago
- verification of simple axi-based cache☆18Updated 6 years ago
- DMA core compatible with AHB3-Lite☆10Updated 6 years ago
- OpenExSys_CoherentCache a directory-based MESI protocol coherent cache IP.☆18Updated 8 months ago
- ☆17Updated 10 years ago
- ☆14Updated 9 months ago
- Direct Access Memory for MPSoC☆13Updated this week
- ☆12Updated 10 years ago
- Pipelined Processor which implements RV32i Instruction Set. Also contains pipelined L1 4-way set-associative Instruction Cache, direct-ma…☆14Updated 2 years ago
- This is a open source project from UVM Community and it is based on an Ethernet Switch System-on-Chip (SoC).☆14Updated 4 years ago
- Verification IP for Watchdog☆12Updated 4 years ago
- ☆26Updated 4 years ago
- DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog☆31Updated 7 years ago
- this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.☆18Updated 11 years ago
- RTL code of some arbitration algorithm☆15Updated 6 years ago
- verification of the basic router protocol with UVM testbech //INCLUDED WITH RTL☆14Updated 6 years ago
- CS533 Course Project (ongoing) - Exploring Parallel Architectures for Neural Processing Unit Implementations☆19Updated 8 years ago
- UVM Testbench for synchronus fifo☆19Updated 5 years ago
- This is the UVM environment for UART-APB IP core. This environment contains full UVM components. It is only used for studing and invetiga…☆24Updated 6 years ago
- Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components☆20Updated 7 years ago
- ☆11Updated 3 years ago
- ☆10Updated 3 years ago
- UVM verification platform for DW_apb_i2c IP core(Master Mode)☆11Updated 2 years ago
- commit rtl and build cosim env☆15Updated last year
- Verification of DMA Controller for 8086 Microprocessor Systems using OO Test bench☆16Updated 5 years ago
- ☆17Updated 3 years ago