Jon3Y / AMBALinks
AHB/APB SRAM Inf, VCS&Verdi Sim.
☆14Updated 3 years ago
Alternatives and similar repositories for AMBA
Users that are interested in AMBA are comparing it to the libraries listed below
Sorting:
- ☆26Updated 4 years ago
- A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM☆26Updated 3 years ago
- work in SSRL, SOC/NOC/Chiplet Design, DDR/UCIe/PCIe, UVM Framework☆35Updated 2 years ago
- AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc☆41Updated 3 years ago
- ☆10Updated 5 years ago
- This is a open source project from UVM Community and it is based on an Ethernet Switch System-on-Chip (SoC).☆13Updated 4 years ago
- This is the UVM environment for UART-APB IP core. This environment contains full UVM components. It is only used for studing and invetiga…☆24Updated 5 years ago
- this is an AHB to APB bridge with Synopsys VIP based test enviroment. RTL can be found from UVM website.☆17Updated 11 years ago
- ☆36Updated 10 years ago
- 支持AXI总线 协议的8k×8 SP SRAM☆25Updated 5 years ago
- AXI Interconnect☆52Updated 4 years ago
- Attempt to setup a bridge between AHB and I2C by constructing dedicated modules of AHB master , AHB slave , APB master , APB slave, I2C m…☆22Updated 6 years ago
- ☆20Updated 2 years ago
- Simple AMBA VIP, Include axi/ahb/apb☆27Updated last year
- UVM Testbench for synchronus fifo☆17Updated 5 years ago
- Verification IP for APB protocol☆69Updated 4 years ago
- An uvm verification env for ahb2apb bridge☆55Updated 4 years ago
- Verilog cache implementation of 4-way FIFO 16k Cache☆20Updated 12 years ago
- Verification IP for APB protocol☆29Updated 5 years ago
- A Direct Memory Access Controller (DMAC) with AHB-lite bus interface☆15Updated 11 months ago
- Maven Silicon Project☆19Updated 6 years ago
- Verification IP for SPI protocol☆19Updated 5 years ago
- Verification IP for I2C protocol☆48Updated 3 years ago
- 包括同步FIFO(输入输出位宽相同),异步FIFO(输入输出位宽相同),异步FIFO(能实现输出数据位宽是输入数据位宽的1/2或2倍)☆21Updated 2 years ago
- ☆16Updated 3 years ago
- ☆11Updated 3 years ago
- Sample UVM code for axi ram dut☆37Updated 3 years ago
- uvm_axi4lite is a uvm package for modeling and verifying AXI4 Lite protocol☆25Updated 7 months ago
- Advance UVM testbench with DPI integration, Assertions, Functional Coverage andHierarchical Sequence☆37Updated 5 years ago
- ☆42Updated last year