Alternatives and similar repositories for 3D_NoC

Users that are interested in 3D_NoC are comparing it to the libraries listed below

• jmjos / ratatoskr
  Ratatoskr NoC Simulator
  ☆27Updated 4 years ago
• mohsaied / rtl2booksim
  Network-on-Chip simulator (Booksim) with hooks for co-simulating RTL designs in Verilog.
  ☆21Updated 9 years ago
• Davxx / gem5_Garnet2.0_extensions
  Fork of the gem5 simulator with Garnet2.0 and DSENT extensions
  ☆11Updated 6 years ago
• hyoukjun / microswitch-noc
  ☆27Updated 5 years ago
• ljgibbslf / basic_cache_core
  ☆29Updated 4 years ago
• pulp-platform / fpu
  ☆51Updated 6 years ago
• wangeddie67 / ESYSim
  ☆37Updated last year
• anan-cn / Open-Source-Network-on-Chip-Router-RTL
  ☆76Updated 10 years ago
• KyleParkJong / Network-on-Chip-Simulator
  Network on-Chip (NoC) simulator for simulating intra-chip data flow in Neural Network Accelerator
  ☆29Updated last year
• bsc-loca / sauria
  SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…
  ☆51Updated 9 months ago
• matutani / nocgen
  NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers
  ☆65Updated 5 years ago
• ic-lab-duth / NoCpad
  HLS for Networks-on-Chip
  ☆35Updated 4 years ago
• Liu-Cheng / cycle-accurate-SystemC-simulator-over-ramulator
  An example of using Ramulator as memory model in a cycle-accurate SystemC Design
  ☆50Updated 8 years ago
• bakhshalipour / NoC-Verilog
  A verilog implementation for Network-on-Chip
  ☆74Updated 7 years ago
• rgb000000 / eyeriss-chisel3
  eyeriss-chisel3
  ☆41Updated 3 years ago
• VincentWang1998 / ai_on_chip_project1
  tpu-systolic-array-weight-stationary
  ☆24Updated 4 years ago
• alexmr09 / Mixed-precision-Neural-Networks-on-RISC-V-Cores
  ☆30Updated last month
• AIC2021 / AIC2021_TPU_Template
  Template for project1 TPU
  ☆19Updated 4 years ago
• hyoukjun / OpenSMART
  Public release
  ☆53Updated 5 years ago
• chsgcxy / messy_notes
  all kind of notes, I maybe sort this in the future
  ☆13Updated 5 months ago
• kuladeepsaireddy / OpenNoc
  ☆34Updated 6 years ago
• linkuri267 / cnn_accelerator
  CNN accelerator using NoC architecture
  ☆16Updated 6 years ago
• amonemi / ProNoC
  Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).
  ☆58Updated last week
• DreamCloud-Project / McSim-TLM-NoC
  Manycore platform Simulation tool for NoC-based platform at a Transactional Level Modeling level
  ☆10Updated 8 years ago
• jessebarreto / NetworkOnChip
  Development of a Network on Chip Simulation using SystemC.
  ☆34Updated 8 years ago
• THU-DSP-LAB / ventus-gpgpu-cpp-simulator
  Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus
  ☆28Updated 3 weeks ago
• CMU-SAFARI / MIG-7-PHY-DDR3-Controller
  A DDR3 Controller that uses the Xilinx MIG-7 PHY to interface with DDR3 devices.
  ☆11Updated 3 years ago
• chipsalliance / aib-protocols
  ☆26Updated last year
• gem5-X / TiC-SAT
  ☆17Updated 2 months ago
• pulp-platform / ITA
  ☆47Updated 2 months ago